Verification method and device for central processor system

A technology for central processing unit and system verification, which is applied in the field of performance verification and can solve the problems of complex circuit structure and workflow of heterogeneous multi-core structure and difficult verification.

Active Publication Date: 2014-12-10
FUZHOU ROCKCHIP SEMICON
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However, due to the complex circuit structure and workflow of t...

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  • Verification method and device for central processor system
  • Verification method and device for central processor system
  • Verification method and device for central processor system

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Embodiment Construction

[0035] In order to describe the technical content, structural features, achieved goals and effects of the present invention in detail, the following will be described in detail in conjunction with the embodiments and accompanying drawings.

[0036] ACE bus protocol: ACE protocol is the coherence extension protocol (ACE) of ARM's AMBA 4 bus, which can realize data consistency between multiple CPU processors, better utilize cache memory and simplify software development.

[0037] Cache: Cache memory (cache) is a memory that exists between the main memory and the CPU. It is composed of a static memory chip (SRAM). The capacity is relatively small but the speed is much higher than that of the main memory, and it is close to the speed of the CPU.

[0038] Please also see figure 1 , 2 , is a schematic structural diagram of a CPU system verification device in an embodiment of the present invention, the device 10 includes a CPU system circuit 20 and a verification module 21 .

[003...

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Abstract

The invention provides a performance testing device and method for a central processor system. The method comprises the steps that stored low-power-consumption processor set programs and high-performance processor programs are initialized, so that corresponding processor set running codes are put on different addresses; the working processor set is judged according to the current task burden to close the power source of processor sets which do not work; the running frequency of the working processor set is recorded to verify whether the switch behavior is correct or not; storage devices are monitored to obtain the availability of the working processor set towards the storage devices; whether the data of the low-power-consumption processor sets and the data of the high-performance processor sets are consistent on the same address in the storage devices is monitored to verify whether consistencies in the different storage devices have mistakes or not; the running efficiency of a DDR of the working processor set is analyzed. Through the verification method and device for the central processor system, a circuit with heterogeneous multi-core processors can be verified, the workload is lightened for engineers, the automation degree is high, and verification is comprehensive.

Description

technical field [0001] The invention relates to a performance verification method, in particular to a central processing unit system verification method and device. Background technique [0002] At present, the heterogeneous multi-core structure can take into account both high-performance and low-power applications, which is the current development trend of high-performance processors for mobile devices. However, due to the complex circuit structure and workflow of the heterogeneous multi-core structure, verification is more difficult. Contents of the invention [0003] Without solving the above problems, the present invention provides a central processing unit system performance testing method and device, so that software simulation can be run for performance at the circuit design stage, and specific and real performance data can be obtained. [0004] The present invention provides a central processing unit system performance testing method, a central processing unit sys...

Claims

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Application Information

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IPC IPC(8): G06F11/36
Inventor 廖裕民
Owner FUZHOU ROCKCHIP SEMICON
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