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Test structure of semiconductor device

A technology for testing structures and semiconductors, applied in the fields of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., and can solve problems such as inability to test the performance of semiconductor devices, difficult semiconductor device simulation, and complex integrated circuits.

Active Publication Date: 2017-07-14
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in general, the test structure of a semiconductor device can only test one parameter of the semiconductor device, and cannot effectively use the test structure of the semiconductor device to test the performance of the semiconductor device.
Secondly, because the integrated circuit in the semiconductor device is very complex, it is difficult to design a structure similar to the integrated circuit in the test structure of many existing semiconductor devices, so it is difficult to simulate these semiconductor devices

Method used

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  • Test structure of semiconductor device
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  • Test structure of semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment

[0031] refer to figure 1 , a test structure of a semiconductor device, the semiconductor device (not shown) includes: a dielectric layer and a multi-layer interconnection line located in the dielectric layer, and the upper and lower adjacent two-layer interconnection lines are electrically connected through a first plug, The test structure of the semiconductor device includes: a test unit 100; the test unit 100 includes: a multilayer test line located in the dielectric layer, and the test line includes a bottom test line M 1 , top test line M 5 , and the top test line M 5 and the underlying test line M 1 The middle test line between the M 2 , M 3 and M 4 ; Electrically connected to the second plug V of the test line 1 , V 2 , V 3 and V 4 ; The middle test line M 2 , M 3 and M 4 The two second plugs respectively located at its two ends are connected to the test lines in the upper and lower layers; any one layer of test lines corresponds to a layer of interconnectio...

no. 2 Embodiment

[0045] refer to Figure 5 , in a specific embodiment, the number of the test unit is at least two, wherein the two test units are respectively the first test unit 201 and the second test unit 202; the first test unit 201 and the second test unit 202 There is at least one layer of test lines in the same layer, and in the same layer, the test lines in the first test unit 201 and the test lines in the second test unit 202 have opposite parts.

[0046] In a specific embodiment, the number of layers of test lines in the first test unit 201 is equal to the number of layers of test lines in the second test unit 202; Corresponding test lines in the same layer.

[0047] In a specific embodiment, the first testing unit 201 and the second testing unit 202 are identical and arranged in parallel. like Figure 5 As shown, the parallel arrangement means that the length direction of each layer of test lines in the first test unit 201 is the same as the length direction of the test lines on...

no. 3 Embodiment

[0066] refer to Figure 7 , the number of the test units is at least two, wherein the two test units are respectively the first test unit 301 and the second test unit 302; the first test unit 301 has at least one layer of test lines satisfying the following conditions: The test line has an opposite portion to a test line in a different layer of the test line in the second test unit.

[0067] continue to refer Figure 7 , the test line M in the first test unit 301 1,4 and the test line M located on the next layer in the second test unit 302 2,3 There are relative parts.

[0068] The test structure of this semiconductor device can only use one of the test units, such as the test unit 301, to test the resistance parameters between the multi-layer test lines.

[0069] It is also possible to determine the dielectric layer between the tested test lines by testing the breakdown voltage of the dielectric layer between the two test lines with opposite parts in the two test units, o...

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Abstract

A test structure of a semiconductor device, the semiconductor device includes: a dielectric layer and a multi-layer interconnection line located in the dielectric layer, the upper and lower adjacent two layers of interconnection lines are electrically connected through a first plug, and the test structure includes: At least one test unit; the test unit includes: a multi-layer test line positioned in the dielectric layer, the test line includes a bottom test line, a top test line, and at least one layer is located between the top test line and the bottom test line The middle test line of each layer; the middle test line of each layer is connected with the test line of the upper layer and the test line of the next layer through two second plugs respectively located at its two ends; any one layer of test lines corresponds to one layer of interconnection lines, The test line is located on the same layer as the corresponding interconnection line, any second plug corresponds to a first plug, and the second plug is located on the same layer as the corresponding first plug. This design can better simulate the real circuit design, and can also conveniently design a similar circuit according to the structure of the integrated circuit in the semiconductor device to meet the test requirements.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a test structure of a semiconductor device. Background technique [0002] In the field of semiconductor manufacturing, with the development of technology, the size of semiconductor devices is getting smaller and higher, and the complexity is getting higher and higher. In order to monitor the manufacturing process of semiconductor devices and ensure the reliability of semiconductor devices, the usual practice is A test structure (testkey) is formed in the semiconductor device for testing and simulating some key parameters of the semiconductor device to ensure the quality of the semiconductor device when it leaves the factory. [0003] The test structure of the semiconductor device is usually manufactured in the same process as the semiconductor device in the wafer, and the test structure of the semiconductor device has a corresponding relationship with the semiconductor device: each ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/544
Inventor 杨志刚
Owner SEMICON MFG INT (SHANGHAI) CORP