SCR (semiconductor control rectifier) device with imbedded GDPMOS high in maintaining voltage

Abstract

The invention discloses an SCR (semiconductor control rectifier) device with an embedded GDPMOS high in maintaining voltage. The SCR device can be used for an ESD (electro-static discharge) protective circuit of a high-voltage on-chip IC (integrated circuit) and is mainly composed of a P-substrate, an N-tape, a P-tape, a first N+ injection area, a first P+ injection area, a second P+ injection area, a second N+ injection area, a third N+ injection area, a third P+ injection area, a metal anode, a metal cathode, a polysilicon gate, a thin gate oxide layer and a plurality of field oxygen isolation areas. Under the action of high-voltage ESD pulses, the SCR device forms a parasitic SCR current discharge path through the first P+ injection area, the trap N, the second N+ injection area, the trap P and the third N+ injection area, and failure current and ESD robustness of the device are improved; on the other hand, a PMOS (P-channel metal oxide semiconductor) transistor is formed by the aid of the first P+ injection area, the polysilicon gate, the thin gate oxide layer and the second P+ injection area, and a GDPMOS transisstor is formed by connecting the gate to high potential. Strong hysteresis of the SCR device can be restrained, the maintaining voltage of the device can be improved, and latch resistance of the device can be enhanced.

Description

technical field [0001] The invention belongs to the field of electrostatic discharge protection of integrated circuits, relates to an ESD protection device, in particular to an ESD protection device with an SCR structure with high sustain voltage, which can be used to improve the reliability of IC high-voltage ESD protection on a chip. Background technique [0002] With the rapid development of integration technology, electronic products are increasingly miniaturized. While improving the performance and integration of integrated structures, the internal structure of integrated circuits is more likely to be damaged when ESD strikes, and the reliability problems caused by ESD are becoming more and more serious. draw people's attention. According to the investigation of various factors that cause the failure of integrated circuit products, it is found that the economic losses caused by ESD in the semiconductor industry are as high as billions of dollars every year. Therefore, ...

AI Technical Summary

Problems solved by technology

[0004] Aiming at problems such as insufficient anti-latch-up ability generally existing in the ESD protection device of existing SCR structure, the example of the present invention designs a kind of ESD protection device with the new SCR structure of high holding voltage, has not only made full use of the strong SCR device The characteristics of robustness, and the increase of the layout level of the thin gate oxide layer covered by P+, polysilicon gate and polysilicon gate in the device, make the device form an embedded GDPMOS structure, under the action of ESD pulse, through a comprehensive trade-off And reasonable control of the layout parameters of the channel length of the PMOS transistor can obtain low trigger, high sustain voltage, and strong robustness ESD protection devices suitable for high-voltage IC circuits

Images