Shift register unit, display panel and display device

Abstract

The embodiment of the invention provides a shift register unit, a display panel and a display device, and aims at solving the problem of high unnecessary power consumption in the stage of non-working caused by the fact that the shift register unit is controlled by a pair of complementary and inverted clock signals. When a selection signal is in high level, a latch circuit outputs the clock signals received by a first clock signal end of the latch circuit and a low-level signal after nor-operation; in the first low-level period of time of the selection signal, the signals output by the latch circuit, when the selection signal is in the high level, are subjected to not-operation to obtain new signals, and the new signals and a feedback signal are output after being subjected to nor-operation; in the period of time except for the first low-level period of time of the selection signal of the period of time when the selection signal is in low level, the low-level signal is output. When the output of latch signal is in the high level, a transmission circuit outputs signals relative to the clock signals received by the first clock signal end of the transmission circuit; when the output of latch signal is in the low level, the transmission circuit outputs a level signal.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a shift register unit, a display panel and a display device. Background technique [0002] A traditional Low Temperature Poly-Silicon (LTPS, Low Temperature Poly-Silicon) shift register unit uses a D flip-flop composed of an inverter and a transmission gate. A traditional LTPS shift register unit generally has two D flip-flops, which can use the D flip-flops to latch the output signal, and use the clock signal to control the transmission and shift of the signal. [0003] figure 1 It is a typical structure of a traditional LTPS shift register unit. exist figure 1 In the LTPS shift register unit shown, the transmission gate TG1, the NAND gate Nand1, the inverter INV1 and the transmission gate TG2 constitute the first D flip-flop, and the transmission gate TG3, the NAND gate Nand2, the inverter INV2 and the transmission gate Gate TG4 constitutes the second D flip-flop. ...

AI Technical Summary

Problems solved by technology

[0007] Embodiments of the present invention provide a shift register unit, a display panel, and a display device, which are used to solve the problem that the existing shift register unit needs to use two complementary and inverted clock signals to control the transmission gate in the shift register unit. Switching between on and off, which causes the non-working phase of the shift register unit to charge and discharge the gate capacitance of the transistor in the transmission gate, causing a large problem of unnecessary power consumption

Images