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Rapid reading method for memory based on diode selection

A diode and memory technology, applied in the field of semiconductor memory, can solve the problem of slow memory reading speed and other problems

Active Publication Date: 2015-02-04
SHANGHAI XINCHU INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Obviously, similar to the aforementioned flash memory unit, the reading speed of the memory based on diode selection will be slightly slower, which is not in line with the expected goal

Method used

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  • Rapid reading method for memory based on diode selection
  • Rapid reading method for memory based on diode selection
  • Rapid reading method for memory based on diode selection

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Embodiment Construction

[0025] exist Figure 3A-3BIn the embodiment, the memory device based on diode selection / gate has a plurality of word lines (Word line, WL) and a plurality of bit lines (Bit line, BL), and each word line WL is all connected to the word line WL decoding Each bit line BL is connected to the bit line BL decoding unit. When the operation of reading byte information is performed, the word line WL decoding unit and the bit line BL decoding unit can be used in the memory array through address decoding. Select the memory cells to be read. For those skilled in the art, these attributes of the memory device are common knowledge, so the subsequent content of the present invention will not repeat these prior arts one by one.

[0026] It should be emphasized that the diode selection / gating based memory device comprises the illustrated array of diode memory cells, each diode of which is coupled between a bit line BL and a word line WL. Specifically, as Figure 3A , each row in the array h...

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Abstract

The invention relates to a semiconductor memory, and aims at providing a rapid reading method for a memory based on diode selection. According to the method, when the memory based on diode selection is at a read waiting state, a bit line is bias and at a voltage 1, a word line is bias and at a voltage 2, and the voltage 1 is equal or slightly larger than the voltage 2, so that a diode between the bit line and the word line is zero bias or at a reverse-bias state; when read operation needs performing on a storage unit, an induction node does not need precharging, the only thing needing to do is to set the word line bias at a low voltage, because the diode is a two-terminal device and only discharges electricity to the word line at one terminal, the bit line keeps extremely short time, and an induction amplifier also is at a pretreatment state in advance, so that the data in the storage unit can be read at a fastest speed.

Description

technical field [0001] The present invention relates to a semiconductor memory, more precisely, the present invention aims to provide a fast reading method for a diode-based gating memory. Background technique [0002] The reading speed of the memory is one of the important indicators affecting the performance of the memory. It is well known that Static Random Access Memory (SRAM) as an on-chip memory has a very fast reading speed, as shown in the attached Figure 1A For the 6T memory shown, this is because the storage node does not need to be precharged when the SRAM memory cell is read, and the bit line BL and bit line BLb are precharged to a supplied power supply voltage VDD in advance. When the address line passes through the address decoder When the word line WL is turned on, the differential sense amplifier SA senses the voltage changes on the bit lines BL and BLb to quickly read out the value of the SRAM memory cell. Generally, the reading speed of the SRAM can reach ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/06
Inventor 亢勇陈邦明
Owner SHANGHAI XINCHU INTEGRATED CIRCUIT
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