Data access method, module, processor and terminal device for hybrid memory

Abstract

The present invention relates to the field of computers. Provided are a hybrid memory data access method, module, processor and terminal device, capable of simplifying the data access process, the method comprising: when the data to be accessed is not in the dynamic random access memory (DRAM), sending preset error data to a memory controller, so that the memory controller triggers a processor according to the preset error data to generate an error correction code (ECC) error interrupt, the data to be accessed being the data in a data access request; while the processor is handling the ECC error interrupt, a concatenation module transfers the data to be accessed in the non-volatile memory (NVM) to the DRAM. The data hybrid memory access method, module, processor and terminal device are used for hybrid memory data access.

Description

technical field [0001] The invention relates to the field of computers, in particular to a hybrid memory data access method, module, processor and terminal equipment. Background technique [0002] With the gradual advancement of technology, the number of cores integrated in the processor continues to increase, and the demand for memory capacity of servers and cloud computing platforms continues to increase, while the growth rate of memory capacity is relatively slow. Usually, memory is mainly used DRAM (Dynamic Random Access Memory, dynamic random access memory), in order to increase the growth rate of memory capacity, research and development of new memory materials has become an inevitable trend. At present, research on new memory materials is mainly concentrated on NVM (Non-Volatile Memory, non-volatile Volatile memory) materials, such as PCM (Phase Change Memory, phase change memory), MRAM (Magnetic Random Access Memory, magnetic random access memory) and flash memory (F...

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Problems solved by technology

[0004] However, the data access method of the above-mentioned hybrid memory needs to redesign the memory management part of the operating system running on the existing processor, such as establishing and updating the flag bits in the page table entries, generating page fault interrupts, etc., and the amount of code modification is relatively large. Large, the data access process is more complex

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