A Hardware Equivalent Synchronous Sampling Device Based on FPGA

Abstract

The invention discloses a hardware equivalent synchronous sampling device based on FPGA. Firstly, a high-speed fixed frequency oversampling module is used to oversample the analog signal, and the frequency fi of the analog signal is obtained by the real-time frequency measurement module, and the extraction rate dynamic adjustment module is based on the simulation The signal frequency fi and the number of sampling points N calculate the sampling frequency fd, and then calculate the quotient I and the remainder D of the oversampling frequency fs divided by the sampling frequency fd, and use D / fd as an error in the cumulative error. When the cumulative error is less than 1, the extraction rate Mi=I, otherwise extraction rate Mi=I+1, dynamically extract clock module according to the clock signal of oversampling frequency fs and dynamic extraction rate Mi, generate the extraction clock signal that dynamic extraction frequency is fd_i=fs / Mi, data extraction module according to The clock signal is extracted to perform data extraction on the oversampled data to obtain the final sampled data. The invention provides an equivalent synchronous sampling device, which can reduce the cumulative error of the sampling interval, has higher sampling precision compared with most traditional hardware sampling methods, and is suitable for high-precision high-speed data sampling.

Description

technical field [0001] The invention belongs to the technical field of synchronous sampling, and more specifically relates to an FPGA-based hardware equivalent synchronous sampling device. Background technique [0002] In the power quality analyzer, the accurate measurement and calculation of various power parameters is the key technology of the instrument, and the basic way to obtain these parameters is to collect data from the power system. Existing sampling techniques are mainly divided into two categories: asynchronous sampling and synchronous sampling. [0003] Asynchronous sampling uses a fixed sampling rate to sample periodic signals. Once the sampling signal frequency changes, it cannot satisfy the sampling frequency that is an integral multiple of the periodic signal frequency to sample the signal, resulting in synchronization errors that affect measurement accuracy. In power system harmonic analysis, using non-synchronous sampling sequences to perform FFT operatio...

AI Technical Summary

Problems solved by technology

The use of phase-locked loop hardware synchronous sampling device does not need to be converted in the interrupt processing of the microprocessor, which can overcome the problem of interrupt response dispersion in the first hardware synchronous sampling method, but still cannot solve the problem of cumulative error

Images