Operational amplifier

Abstract

The invention discloses an operational amplifier. The operational amplifier comprises a first-stage amplification circuit and a second-stage amplification circuit, wherein the first-stage amplification circuit is a single-end output differential amplification circuit, the inverted phase output end of the single-end output differential amplification circuit serves as the output end of the first-stage amplification circuit, and a first-stage amplification signal is output; the input end of the second-stage amplification circuit is connected with the output end of the first-stage amplification signal, and a second-stage amplification signal is output; a first capacitor is connected between the input end and the output end of the second-stage amplification circuit; the second-stage amplification circuit comprises a first MOS (Metal Oxide Semiconductor) transistor; the first MOS transistor is connected with the output end of the second-stage amplification circuit and provides a current source load for the second-stage amplification circuit; the inverted phase input end of the single-end output differential amplification circuit is connected to a gate of the first MOS transistor through a second capacitor to form a feed-forward path; the trans-conductance of the first MOS transistor is set to be greater than that of the first-stage amplification circuit, so that a left half plane zero point is formed by the operational amplifier. The stability of the operational amplifier can be improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing, in particular to an operational amplifier. Background technique [0002] Such as figure 1 Shown is the circuit diagram of the existing operational amplifier; the input tube of the differential amplifier circuit is composed of NMOS tube MN1 and NMOS tube MN2, the drains of PMOS tube MP1 and NMOS tube MN1 are connected to the active load of NMOS tube MN1, and the PMOS tube MP2 and The drain of the NMOS transistor MN2 is connected to the active load of the NMOS transistor MN2, the NMOS transistor MN4 is connected to the sources of the NMOS transistors MN1 and MN2 and provides a current source for the NMOS transistors MN1 and MN2; the current source I1 is input to the NMOS transistor MN3, and the NMOS transistor MN3, MN4 and MN5 form a mirror circuit. The drain of the NMOS transistor MN2 inputs the first-stage amplified signal. The PMOS transistor MP3 is the second-stage amplifie...

AI Technical Summary

Problems solved by technology

[0007] It can be seen that the structure of the second-stage amplifier introduces two poles. The capacitor Cm forms Miller compensation to widen the distance between the two poles, but the capacitor Cm also forms a gap between the first-stage amplified signal and the second-stage amplified signal. Feed-forward path, the feed-forward path will bring a right-half-plane zero point, the right-half-plane zero point will not only increase the gain but also reduce the phase, thus increasing the instability of the circuit

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