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Device for achieving Galois field multiplication and application method thereof

An application method and multiplication technology, which is applied in the field of digital signal processors, can solve the problems that the optimization results are difficult to achieve the desired effect and the complexity is large, and achieve the effects of convenient management and optimization, reducing the number of operations, and increasing processing efficiency

Active Publication Date: 2015-03-11
安徽芯纪元科技有限公司
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Problems solved by technology

However, the implementation complexity of the current algorithm optimization method is relatively large, and the optimization results are difficult to achieve the desired effect

Method used

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  • Device for achieving Galois field multiplication and application method thereof
  • Device for achieving Galois field multiplication and application method thereof
  • Device for achieving Galois field multiplication and application method thereof

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Embodiment Construction

[0029] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and implementation examples. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0030] Such as figure 1 As shown, the device for implementing Galois field multiplication of the present invention includes a selection front-end module 1 , a selection component module 2 and a selection back-end module 3 . The three modules are respectively composed of three simple logic operation components: selector, multiplier and XOR circuit.

[0031] Such as figure 2 As shown, the selection front-end module 1 includes two 32-bit first selectors (MUX) 11 , a first multiplier 12 and a first exclusive OR circuit 13 .

[0032] One of the first selectors 11 selects the multiplier r...

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Abstract

The invention discloses a device for achieving Galois field multiplication and an application method thereof. The device comprises a selection front end module, a selection component module and a selection back end module that all consist of a selector, a multiplier and an exclusive-or circuit. Therefore, the circuit of the device is simple and concise, the management and optimization are convenient, and the complexity of hardware implementation and of circuit development is reduced; the purpose of increasing the performance without additional complex circuits is achieved, meanwhile the storage consumption is reduced, the processing efficiency is increased while the processing time is reduced, and the number of operations is reduced. The selection front end module comprises a selector, a multiplier and an exclusive-or circuit; a selection front end output is obtained based on the multiplicand, the selection multiplicator and the Galois factor. The selection component module comprises a selector, a multiplier and an exclusive-or circuit; a selection component output is obtained based on the selection front end output, the multiplicator and the Galois factor. The selection back end module comprises a selector and an exclusive-or circuit; the output result of the Galois field multiplication is obtained based on the selection component output and the multiplicator.

Description

technical field [0001] The invention belongs to the technical field of digital signal processors, and relates to a device for realizing Galois field multiplication and an application method thereof, which is a hardware realization of Galois field multiplication. Background technique [0002] Finite fields contain finite elements, and finite field multiplication is widely used in the field of cryptography, and many encryption authentication algorithms use finite field multiplication. The F field is a finite field containing at least two elements. Two arithmetic operations, addition and multiplication, are defined on the F field, and both the addition and multiplication operations are binary arithmetic operations. Galois Field (GFQ) is the smallest finite field, containing only two elements of 0 and 1, and addition and multiplication are only modulo 2 operations, so addition is equivalent to XOR logic, which can be realized with an XOR gate , while multiplication is equivalen...

Claims

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Application Information

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IPC IPC(8): G06F7/52
Inventor 王媛马强胡孔阳刘小明龚晓华万晓佳
Owner 安徽芯纪元科技有限公司
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