Superjunction device and manufacturing method

Abstract

The invention discloses a super-junction appliance. A current flow area comprises a plurality of N type thin layers and P type thin layers which are alternately arranged, wherein the bottoms of the N type thin layers and P type thin layers are in contact with an N+ silicon substrate at the bottom; the N type thin layers include two types; the two types of N type thin layers comprise high-resistance parts in the middle and low-resistance parts on the two sides; the charges of the first type of N type thin layers and the P type thin layers are balanced; the high-resistivity parts of the second type of N type thin layers are relatively wide; the charges of the second type of N type thin layers and the P type thin layers are not balanced. After the P type thin layers perform transverse consumption on the second type of N type thin layers, with the increase of reverse bias voltage, P traps on the tops of the N type thin layers perform gradually expanded longitudinal consumption on the high-resistance parts of the second type of N type thin layers. The invention also discloses a manufacturing method of the super-junction appliance. The reverse recovery characteristics of the appliance can be improved, the proportional conduction resistance is relatively low, and dependency of the appliance to a ditch process can be improved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a super junction device; the invention also relates to a manufacturing method of the super junction device. Background technique [0002] The super junction MOSFET adopts a new voltage-resistant layer structure, and uses a series of alternately arranged P-type semiconductor thin layers and N-type semiconductor thin layers to combine the P-type semiconductor thin layers and N-type semiconductor thin layers at a lower voltage in the off state. The thin layer of semiconductor is depleted to achieve mutual compensation of charges, so that the thin layer of P-type semiconductor and thin layer of N-type semiconductor can achieve high breakdown voltage under high doping concentration, so as to obtain low on-resistance and high breakdown at the same time voltage, breaking the theoretical limit of traditional power MOSFETs. In U.S. Patent US5216275, the above...

AI Technical Summary

Problems solved by technology

[0004] In the super junction process, due to the use of alternating P / N thin layers, the body diode of the super junction device, that is, the diode formed between the P-type semiconductor thin layer and the N-type semiconductor thin layer, can operate at a lower voltage such as 50 volts Vds The P-type semiconductor thin layer and the N-type semiconductor thin layer will be completely depleted, which makes the diode have a very hard reverse recovery characteristic. This hard reverse recovery characteristic causes the recovery current of the device to change sharply. The recovery fluctuates violently, causing electromagnetic interference (EMI-ELECTROMAGENETIC INTERFERENCE) in the circuit, which affects the work of other devices in the circuit. In this regard, super junction devices are not as good as conventional MOSFET devices, because conventional MOSFET devices N - The depletion of the drift region always expands with the increase of the voltage (Vds), and the reverse recovery characteristic is soft

On the other hand, in the existing trench filling process, the bottom of the trench stays in the N-epitaxy, and the depth of the trench directly affects the breakdown voltage and other characteristics of the device, which also causes uniformity problems. When the resistivity is lowered to reduce the specific on-resistance, it will cause a big problem with the process margin

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