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Semiconductor device

A semiconductor and device technology, applied in the field of semiconductor devices, can solve the problems of increasing drift region resistance, unfavorable mesa width, high gate charge and output capacitance, etc.

Inactive Publication Date: 2015-04-22
VISHAY SILICONIX LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this scaling can also result in an unfavorable narrower mesa width per unit area, potentially increasing the drift region resistance
In addition, higher density of gate and shield electrodes may result in detrimentally higher gate charge and output capacitance

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

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Embodiment Construction

[0015] Referring now in detail to various embodiments of the present invention, examples of hybrid split gate semiconductors are illustrated in the accompanying drawings. While the invention will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the invention, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, one of ordinary skill in the art will recognize that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscur...

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Abstract

Hybrid Split Gate Semiconductor. In an embodiment in accordance with the present technology, a semiconductor device includes a vertical channel region, a gate at a first depth on a first side of the vertical channel region, a shield electrode at a second depth on the first side of the vertical channel region, and a hybrid gate at the first depth on a second side of the vertical channel region. The region below the hybrid gate on the second side of the vertical channel region is free of any electrodes.

Description

[0001] related case [0002] This application is related to US Patent Application No. 12 / 603,028, filed October 21, 2009, entitled "Split Gate Semiconductor Device with Curved Gate Oxide Profile." This application is also related to US Application No. 12 / 869,554, filed August 26, 2010, and entitled "Structures and Methods of Fabricating Split Gate MIS Devices." Further, this application is related to and claims priority from US Patent Application No. 13 / 460,567, filed April 30, 2012, and entitled "HYBRID SPLIT GATE SEMICONDUCTOR." All of these applications are fully incorporated herein by reference. technical field [0003] Embodiments of the present technology are related to the field of design and fabrication of integrated circuits. More specifically, embodiments of the present technology relate to systems and methods for hybrid split gate semiconductors. Background technique [0004] Split-gate power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) have re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/41766H01L29/66734H01L29/7813H01L29/407H01L29/42368H01L29/4236
Inventor 马督儿·博德曲飞·陈米斯巴赫·乌尔·阿藏凯尔·特里尔阳·高莎伦·石
Owner VISHAY SILICONIX LLC