A Sopc Chip Fault Tolerance Method Based on Readback Self-Reconfiguration

A self-reconfiguration and chip technology, applied in the direction of response errors, etc., can solve the problems that the data arbitrator cannot be given, the design concept is contradictory, and the size is small.

Active Publication Date: 2017-12-01
BEIJING MXTRONICS CORP +1
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to adapt to the harsh space environment, traditional space-borne electronic equipment generally adopts redundant methods to improve system reliability, such as dual-machine backup, three-machine backup and other redundancy schemes, but most of the redundancy schemes are aimed at known Designed for failure modes, there is no effective way to deal with complex and unknown failures
In addition, even if the mechanism of triple-mode redundancy TMR is used, it can only accommodate one fault at most. When there are two or more faults, errors will occur because the data arbiter cannot give the correct arbitration result.
The triple-mode redundancy method can only filter faults, but cannot repair the faults that occur
At the same time, the satellite on a chip itself is extremely small, and the redundant design scheme will inevitably lead to an increase in volume, which is contrary to the design concept of the satellite on a chip

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A Sopc Chip Fault Tolerance Method Based on Readback Self-Reconfiguration
  • A Sopc Chip Fault Tolerance Method Based on Readback Self-Reconfiguration
  • A Sopc Chip Fault Tolerance Method Based on Readback Self-Reconfiguration

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038] The present invention studies the autonomous fault-tolerant design of the domestic SoPC chip BM3109, and seeks to realize autonomous fault detection and fault repair of the chip based on the "readback-reconfiguration" method without increasing the area of ​​the SoPC chip. By breaking through this key technology, it will help improve the reliability of SoPC chips in the application of outer space environments, and help promote the development of domestic SoPC chips. The invention provides an autonomous fault tolerance and fault recovery capability for the domestic SoPC chip BM3109, without adding peripheral detection equipment and detection circuits, based on the fault tolerance mechanism of "readback-self-reconfiguration", the BM3109 can operate in the space environment Under this condition, the fault detection, fault interpretation, and fault repair can be completed independently.

[0039] Fault detection: Start to configure the control pin of Flash in BM3109, under th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

A SoPC chip fault-tolerant method based on readback self-reconfiguration, aiming at the problem that the traditional radiation-hardened FPGA will have multiple particle flips in space every day, it provides a method based on the feedback without increasing the SoPC chip area. The self-reconfiguration mode of reading realizes the method of autonomous fault detection and fault repair of the chip. The method of the present invention first reads the configuration data in the FPGA configuration memory and the original configuration data stored in the Flash, and then compares the two bit by bit, and can verify whether the read-back configuration data has a fault by comparing the difference in the file format. Locate the fault, and finally correct the fault according to the original configuration file. The method of the invention completes fault detection, fault interpretation and fault repair without increasing peripheral detection equipment and detection circuits, improves the reliability of SoPC chips in outer space environment applications, and promotes the development of SoPC chips.

Description

technical field [0001] The invention relates to an intelligent autonomous fault tolerance and fault repair of a domestic SoPC (Programing System on Chip) chip BM3109, in particular to a SoPC chip fault tolerance method based on readback self-reconfiguration, so that the SoPC chip can be used in an outer space environment. Ability to autonomously detect and repair faults. Background technique [0002] Traditional radiation-hardened FPGAs will have multiple particle flips (SEU) in space every day. For example, the XQVR300 FPGA in LEO orbit flips an average of 2.05 times a day, while the XQR4036XL in a 98-degree inclined orbit flips up to 148.5 times a day when solar flares are abnormal. Second-rate. In order to adapt to the harsh space environment, traditional space-borne electronic equipment generally adopts redundant methods to improve system reliability, such as dual-machine backup, three-machine backup and other redundancy schemes, but most of the redundancy schemes are a...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/07
Inventor 兰利东陆振林赵元富王建永焦烨李璟刘薇王猛李楠
Owner BEIJING MXTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products