Check patentability & draft patents in minutes with Patsnap Eureka AI!

Fabrication method of split-gate flash memory

A manufacturing method and memory technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve problems such as source polysilicon residual premature failure, and achieve the effect of solving programming crosstalk failure

Active Publication Date: 2017-08-25
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The problem to be solved by the present invention is to provide a manufacturing method of split-gate flash memory, which adjusts and solves the problem of programming crosstalk failure caused by too long chemical mechanical polishing time of source polysilicon, and improves the problem caused by too little reverse etching time. Source polysilicon residue eventually causes premature failure problems

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fabrication method of split-gate flash memory
  • Fabrication method of split-gate flash memory
  • Fabrication method of split-gate flash memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] The split-gate flash memory of the prior art has the problem of programming crosstalk failure. After the inventor analyzes the position where the programming crosstalk failure occurs, it is found that the programming crosstalk failure mainly occurs at the edge of the semiconductor wafer, and the word line (Word line) of the programming crosstalk cell occurs. Line) is lower than the word line of a normal flash memory cell.

[0027] The failure degree of the above programming crosstalk is affected by the size of the etched source polysilicon layer. The smaller the size of the source polysilicon layer after etching, the more serious the degree of crosstalk failure in split-gate flash memory programming. An obvious reason for affecting the size of the etched source polysilicon layer is that the time of the chemical mechanical polishing process is too long. Specifically, the longer the time of the chemical mechanical polishing process, the smaller the height of the source p...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention proposes a method for fabricating a split-gate flash memory. After the source polysilicon layer is chemically mechanically polished, the source polysilicon layer is reverse-etched, and the required reverse-etch time is related to the reverse-etch time. The etching amount has a linear relationship, and the reverse etching amount is the difference between the characteristic size of the polysilicon after the chemical mechanical polishing process and the target size of the polysilicon after the reverse etching. The manufacturing method of split-gate flash memory provided by the present invention utilizes a positive feedback system while reducing chemical mechanical polishing time as much as possible, on the one hand, it solves the programming crosstalk failure caused by too much reverse etching time, and on the other hand On the one hand, the problem of premature failure caused by polysilicon residue caused by too little reverse etching time is solved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a divided-gate flash memory. Background technique [0002] Random access memory (such as DRAM and SRAM) has the problem of data loss after power failure during use. In order to overcome this problem, various flash memories have been designed and developed. The flash memory based on the floating gate concept has become a more general flash memory due to its smaller cell size and good working performance. [0003] Flash memory includes two basic structures: stack gate and split gate. [0004] The gate stack flash memory includes: a tunnel oxide layer formed sequentially on the semiconductor substrate, a floating silicon nitride layer for storing electrons, a control oxide layer, and a control gate polysilicon layer for controlling electron storage and release, namely SONOS structure. [0005] The split-gate flash memory includes: a semiconducto...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/8232
CPCH01L22/12H01L22/26H10B41/00H10B69/00
Inventor 徐涛汤志林曹子贵
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com