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Data depth traceability test method

A test data and depth technology, applied in the field of deep traceability of test data, can solve problems such as failure information cannot be quickly obtained, data analysis efficiency is low, etc., and achieve the effect of improving efficiency and data analysis efficiency

Active Publication Date: 2015-05-06
SINO IC TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a method for in-depth traceability of test data to solve the problems of low data analysis efficiency and inability to quickly obtain specific failure information during failure analysis

Method used

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Embodiment Construction

[0025] The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0026] The present invention provides a method for deep traceability of test data, such as Figure 4 shown, including the following steps:

[0027] S1: Obtain information related to the tested product from the server in real time.

[0028] Specifically, the information related to the tested product includes: wafer lot number (LotID), wafer number (WaferID), test start time, end time, test data, chip classification results, ie binning results, etc.

[0029] The binning results are the corresponding classificati...

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Abstract

The invention provides a data depth traceability test method. The method comprises the steps of: timely acquiring relevant information of a product to be tested from a server; reading the information acquired from the server by regular expression, performing stored storing on key information in the information, and drawing a yield rate drawing; and according to the yield rate drawing, acquiring the yield rate of the product to be tested, the failure distribution, specific failure information of a failure chip on the product to be tested, and specific information of the chip passing the test on the product to be tested. The key information related to the product to be tested is subject to stored storing by regular expression, the yield rate drawing is drawn, and an engineer can visually know the yield rate and the failure distribution of the product to be tested according to the yield rate drawing; the specific failure information of the failure chip on the product to be tested can be acquired, and the efficiency of failure analysis is improved; and the specific test information of the chip passing the test can be acquired, and the normal data analysis efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing equipment, in particular to a method for deep traceability of test data. Background technique [0002] With the rapid development of the semiconductor testing industry, both mid-test (wafer test) and final test (test after chip packaging) are facing a challenge. The demand for output is increasing, and the amount of test data generated is also increasing. The larger the data volume, the greater the workload of engineers doing failure analysis on products. Therefore, while the workload increases, it is necessary to find ways to improve the efficiency of data analysis, especially the efficiency of failure analysis. [0003] Thousands of wafers or thousands of chips, the amount of data generated after testing is huge. If you only rely on manual search for the specific location of the desired data information in the massive data, the efficiency is too low. It's not realistic ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
Inventor 苏涛张志勇王华凌俭波王锦郝丹丹
Owner SINO IC TECH
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