System and method for controlling I2C communication based on FPGA (Field Programmable Gate Array)

A communication system and control module technology, applied in the direction of instrumentation, electrical digital data processing, etc., can solve the problems of inability to meet high-speed communication, slow speed, and reduce the efficiency of device communication, and achieve high flexibility, portability, and portability strong effect

A communication system and control module technology, applied in the direction of instrumentation, electrical digital data processing, etc., can solve the problems of inability to meet high-speed communication, slow speed, and reduce the efficiency of device communication, and achieve high flexibility, portability, and portability strong effect

CN104598418AInactive Publication Date: 2015-05-06OPWILL TECH BEIJING

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  • System and method for controlling I2C communication based on FPGA (Field Programmable Gate Array)
  • System and method for controlling I2C communication based on FPGA (Field Programmable Gate Array)

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0050] Please refer to figure 1 , a kind of FPGA-based control I2C communication system provided by the present invention is used for communication between the slave device and the master device in the communication system, and the MCU (Micro Control Unit, micro control module) of the slave device is passed through the master control I2C module Connect an FPGA, form the FPGA unit through programming, and the FPGA unit includes: a main control I2C module, a control module and a first storage module, wherein,

[0051] The main control I2C module includes:

[0052] I2C_start, the start flag register, used to set the start flag value of the master I2C module;

[0053] I2C_DIV, the clock register, is used to set the clock frequency value of the master I2C module to transmit data;

[0054] I2C_data_len, the data length register, is used to set the length value of a read or write data of the master I2C module;

[0055] I2C_wen, read and write flag register, used to set the read an...

Embodiment 2

[0087] Such as figure 2 As shown, a kind of FPGA-based system and method for controlling I2C communication provided by the present invention includes:

[0088] Start flag register (I2C_start), set the start flag value of the main control I2C module;

[0089] Clock register (I2C_DIV), set the clock frequency value of the master I2C module to transmit data;

[0090] Data length register (I2C_data_len), which sets the length value of one read and write data of the main control I2C module;

[0091] Read and write flag register (I2C_wen), set the read and write flag value of the main control I2C module;

[0092] Address register (I2C_addr), set the address value of the slave device;

[0093] Write register (I2C_wdata), set the written data value;

[0094] Read register (I2C_rdata), set the read data value;

[0095] Continuous read and write flag register (I2C_sr), set the flag value of continuous read and write master I2C module;

[0096] The continuous data length register ...

Embodiment 3

[0138] Please refer to figure 1 and figure 2 , a kind of FPGA-based system and method for controlling I2C communication provided by the present invention is used for communication between the slave device and the master device in the communication system, and the MCU (Micro Control Unit, micro control module) of the slave device is passed through the master control The I2C module is connected to an FPGA and programmed to form an FPGA unit. The FPGA unit includes: a CPU interface module, a plurality of master I2C modules, a control module, a first storage module, a second storage module, and a plurality of slave I2C modules, wherein,

[0139] The CPU interface module communicates with the external CPU through the CPU bus, and the external CPU reads and writes the register opened inside the FPGA through the CPU bus to initiate and terminate the I2C start operation, so as to achieve the purpose of control and query state;

[0140] Described master control I2C module includes fo...

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Abstract

The invention discloses a system and a method for controlling I2C communication based on an FPGA (Field Programmable Gate Array). The system and the method are applied to communication between slave equipment and host equipment in a communication system. MCUs (Micro Control Units) of the slave equipment are connected with the FPGA through main control I2C modules, and an FPGA unit is constructed by programming. The FPGA unit comprises the main control IC2 modules, a control module and a first storage module, wherein the main control I2C modules are connected with the control module and the first storage module respectively; the main control I2C modules comprise a leading flag register, a clock register, a data length register, a read-write flag register, an address register, a write register, a read register, a continuous read-write flag register and a continuous data length register. In the I2C modules provided by the invention, nine special registers are designed for realizing read-write functions, so that high flexibility and portability are achieved, one-time reading and writing operation can be realized, and read operation and write operation can be implemented separately.

Description

technical field [0001] The invention belongs to the field of communication control, and relates to a system and method for controlling I2C communication based on FPGA. Background technique [0002] With the rapid development of communication technology, sensor technology, embedded operation technology and microelectronics technology, the integration of smart products is getting higher and higher, so the communication speed requirements of the board-level circuit of the product are also increasing. As a basic communication method between chips, the I2C protocol is widely used in electronic devices. Therefore, improving the communication speed of I2C between devices is crucial to improving the system speed. [0003] At present, when researchers design the system, they connect the master device of the customized circuit and the slave devices with a limited number of I2C interfaces. The master device with only one I2C interface can only communicate with multiple I2C slave devic...

Claims

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Application Information

Patent Timeline
06 May 2015
Publication
CN104598418A
IPC
G06F13/38
CPC
G06F13/4282
Inventors
朱天全; 鲍胜青