Array substrate, production method thereof and display device
A technology for array substrates and manufacturing methods, which is applied in the display field, can solve the problems of complex array substrate processes, high costs, and low yields, and achieve the effects of reducing mask times, increasing yields, and reducing process complexity and process costs
Active Publication Date: 2015-05-13
BOE TECH GRP CO LTD
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Problems solved by technology
Too many times of Mask in the above-mentioned process leads to complex array substrate process, high cost and low yield, which limits the wide application of LTPS technology
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[0044] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.
[0045] The invention provides a method for manufacturing an array substrate, comprising:
[0046] Step one, such as figure 1 As shown, a light-shielding layer 2, a buffer layer 3, an active layer 4, a gate insulating layer 5, a gate line ( figure 1 Not shown in ), common electrode line 61 and grid 62 patterns. The specific formation process is formed by a patterning process (the patterning process generally includes processes such as photoresist coating, exposure, development, etching, and photoresist stripping). Wherein, the active layer 4 is a polysilicon active layer, and the step of forming the polysilicon active layer includes: forming an amorphous silicon layer on...
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The invention relates to the technical field of display and discloses a production method of an array substrate. The production method includes: forming pictures including a shade layer, a buffer layer, an active layer, a grid insulation layer, a grid line, a common electrode wire and a grid electrode; forming an interlayer insulation film, patterning the interlayer insulation film through first photoresist to form a source-drain metal film and second photoresist, and forming pictures including an interlayer insulation layer, a source electrode, a drain electrode and a data line through matching of the first photoresist and the second photoresist; forming pictures including an organic insulation layer and a common electrode, and connecting data lines which span the grid line and the common electrode wire; forming pictures including a passivation layer and a pixel electrode. The invention further discloses an array substrate and a display device. The production method of the array substrate only needs one mask technique in forming the interlayer insulation layer, the drain electrode and the source electrode, reduces by one mask technique compared with the prior art, accordingly reduces the technique complexity and technique cost, and improves yield.
Description
technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] Low-temperature polysilicon (LTPS) materials can be used as semiconductor materials for high-performance LCD and AMOLED display devices due to their extremely high mobility, and CMOS circuits can be integrated on array substrates to achieve narrow borders and low power consumption. However, the LTPS backplane process is more difficult. In addition to the difficulty in annealing uniformity and doping control of amorphous silicon, more mask times also limit its application. The number of masks currently used for LTPS HADS+Resin is 10, which are light shielding layer→low temperature polysilicon layer→P doping→N doping→ILD→S / D→Resin→ITO1→PVX2→ITO2. Too many mask times in the above-mentioned process lead to complex array substrate process, high cost and low yield, thus lim...
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IPC IPC(8): H01L27/12H01L21/77
Inventor 舒适孙双崔承镇张锋
Owner BOE TECH GRP CO LTD