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Resistive memory element and method of operation thereof

A technology of resistive storage and operation method, applied in the direction of electrical components, etc., can solve the problems of large drive current, component performance reduction, long programming time, etc., to achieve the effect of improving performance and shortening the programming time

Active Publication Date: 2017-07-04
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this case, the voltage state of the source line switches repeatedly, and this voltage switching requires a large driving current and a long programming time, thereby reducing the performance of the device

Method used

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  • Resistive memory element and method of operation thereof
  • Resistive memory element and method of operation thereof
  • Resistive memory element and method of operation thereof

Examples

Experimental program
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Embodiment Construction

[0049] figure 1 It is a schematic top view of a resistive memory device according to an embodiment of the present invention. Figure 2A for the edge figure 1 The cross-sectional schematic diagram depicted by the II' line. Figure 2B for the edge figure 1 The cross-sectional schematic diagram depicted by the II-II' line. Figure 2C for the edge figure 1 The cross-sectional schematic diagram depicted by the line III-III'. exist figure 1 In the figure, for the sake of clarity, the substrate, doped region, conductive plug, insulating layer and other components are not shown, but the arrangement / position of these components can be clearly known in other sections.

[0050] Please also refer to figure 1 as well as 2A to 2C , the resistive memory element 10 of the present invention includes a plurality of isolation structures 102, a plurality of gate structures 106a and 106b, a conductive layer 112, a plurality of variable resistance blocks 120, a plurality of bit lines 126 a...

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PUM

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Abstract

The invention relates to a resistive memory element. A plurality of isolation structures are configured in a substrate and extend in a first direction. A plurality of character lines are configured on the substrate and extend in a second direction different from the first direction. At least one doping area is configured in the substrate between every two adjacent character lines. A conductive layer is configured on the character lines. The conductive layer is provided with a plurality of conductive blocks and a plurality of lead wires extending in the second direction, at least one conductive block is configured between every two adjacent lead wires, and the lead wires and the conductive blocks are electrically connected with the doping areas. A plurality of variable resistance blocks are configured on the conductive blocks respectively and electrically connected with the conductive blocks. A plurality of bit lines extending in the first direction are configured on the conductive layer and electrically connected with the variable resistance blocks. The invention further provides an operating method of the resistive memory element.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of operation thereof, and more particularly, to a resistive memory element and a method of operation thereof. Background technique [0002] The non-volatile memory bank has the advantage that the stored data will not disappear after the power is turned off, so it is a necessary storage element for many electrical products to maintain normal operation. At present, resistive random access memory (RRAM) is a non-volatile memory actively developed in the industry, which has the advantages of low write operation voltage, short write and erase time, long memory time, non-volatile The advantages of destructive reading, multi-state memory, simple structure and small required area have great application potential in future personal computers and electronic devices. [0003] In an RRAM array, in order to reduce the size of memory cells, it is a conventional practice to connect all source regio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L45/00
Inventor 张文岳
Owner WINBOND ELECTRONICS CORP