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Forming method of semiconductor device

A semiconductor and device technology, applied in the field of semiconductor device formation, can solve the problems of affecting the quality of the stress layer, increasing the difficulty of the process and manufacturing cost, and the complexity of the in-situ doping process, so as to achieve the process of improving the conductivity and reducing the difficulty of the connection process Effect

Active Publication Date: 2015-07-01
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

[0005] However, in the in-situ doping process on the protective layer, the stress layer of the PMOS transistor and the stress layer of the NMOS transistor are doped with different types of ions, so the in-situ doping process is complicated. In addition, the in-situ doping process Among them, the selectivity of epitaxy is not good, which affects the quality of the formed stress layer; and the process of implanting ions corresponding to the source and drain electrodes of the PMOS transistor and the NMOS transistor into the protective layers 22 and 32 is cumbersome, which increases the difficulty of the process and the manufacturing cost.

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Embodiment Construction

[0051] As mentioned in the background technology, after the stress layer of the PMOS transistor and the NMOS transistor is formed, a protective layer needs to be formed on the stress layer of the PMOS transistor and the NMOS transistor to protect the formed stress layer from damage. However, due to the poor electrical conductivity of the protective layer, in-situ doping of the protective layer is required, or ions corresponding to the source and drain electrodes of the corresponding PMONS transistor or NMOS transistor are implanted into the protective layer after the protective layer is formed, In order to improve the conductivity of the protection layer, metal plugs are then formed on the protection layer to realize the connection between the PMOS transistor and the NMOS transistor and external devices.

[0052] However, in the actual operation process, the process of in-situ doping the protective layer or implanting ions into the protective layer is difficult and cumbersome....

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Abstract

The invention discloses a forming method of a semiconductor device. The forming method includes the steps of: forming a stress layer at the periphery of the gate structure of a semiconductor substrate, and forming a protection layer on the stress layer; after a dielectric layer for covering the gate structure is formed on the semiconductor substrate, etching the dielectric layer to form a through hole penetrating the silicon protection layer, and then depositing metal atoms in the stress layer along the through hole to form a metal silicide conductive layer on the surface of the stress layer; filling metal material into the through hole to form a metal plug. According to the forming method, the metal silicide conductive layer is directly formed on the surface of the stress layer, so that the stress layer is directly electrically connected with the metal plug, so that the step of injecting ions into the protection layer covering the stress layer is avoided, and thereby difficulty for preparing the embedded stress transistor is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor formation, in particular to a method for forming a semiconductor device. Background technique [0002] In VLSI, strained silicon technology (Strained Silicon) is usually used to form tensile stress on NMOS transistors and compressive stress on PMOS transistors, thereby increasing the carrier mobility of NMOS transistors and PMOS transistors, increasing the The driving current improves the response speed of the circuit. Embedded stress transistor is one of the hotspots in the application of strained silicon technology. [0003] Such as figure 1 As shown, the existing embedded stress transistor includes a “Σ”-shaped compressive stress layer 21 around the PMOS transistor 20 and a “U”-shaped tensile stress layer 31 around the NMOS transistor 30 . In the formation process of the embedded stress transistor, a protective layer 22 needs to be formed on the compressive stress layer after the compressive str...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8232
CPCH01L21/768H01L21/8238H01L29/7842H01L29/7848
Inventor 毛刚
Owner SEMICON MFG INT (SHANGHAI) CORP