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Phase interpolator control circuit

A phase interpolator and control circuit technology, applied in a single output arrangement and other directions, can solve the problems of discontinuous jump, large clock jitter and data jitter, and achieve the effect of reducing jitter

Active Publication Date: 2015-07-29
CHENGDU CORPRO TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the traditional control circuit controls the interpolation phase to change between two adjacent phase intervals, there will be discontinuous jumps at the edges of the intervals, which will cause large clock jitter and data jitter

Method used

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Embodiment Construction

[0021] The technical solution of the present invention will be further described below in conjunction with the accompanying drawings, but the content protected by the present invention is not limited to the following description.

[0022] Such as figure 1 As shown, a phase interpolator control circuit, after sampling and phase detection of the input serial data, realizes phase interpolation by controlling the coarse adjustment and fine adjustment of the phase at the same time, and it includes the following circuit modules:

[0023] Input sampler: Use the sampling clock to sample the input serial data bits and edges, for example, use 2 sets of orthogonal clock signals to sample the input data, 1 set of clock sampling data bits, 1 set of clock sampling data edges, and sample The result is input to the phase detector;

[0024] Phase detector: By detecting the data bits and edges of multi-bit serial data to judge the phase relationship between the sampling clock and the data (inc...

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PUM

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Abstract

The invention discloses a phase interpolator control circuit. Input high-speed serial data is sampled through an input sampler, a phase detector module detects data bit and edge information and determines a phase relation (advanced or lagged) between a sampling clock and data, phase coarse adjusting is performed by use of the phase relation, a phase interval is selected, at the same time, through fine adjusting, phase interpolation is carried out according to weight information in the phase interval, and if an interpolation is at the edge of the phase interval, only one edge of the interval is changed and a weight factor is adjusted towards an opposite direction, such that it is ensured that phase adjustment is continuously changed. The phase interpolator control circuit provided by the invention enables the phase adjustment of the sampling clock to be continuously changed in the phase interval and between adjacent phase intervals, does not generate phase abrupt change when the sampling clock spans the phase interval, and can effectively reduce jittering of the clock and the data.

Description

technical field [0001] The invention relates to a phase interpolator control circuit, in particular to a phase interpolator control circuit used for clock data recovery in a high-speed data transmission system. Background technique [0002] High-speed serial data transceivers are widely used in high-speed two-way data transmission systems, such as Gigabit Ethernet, optical fiber transmission networks, high-speed network routing and wireless base stations, etc., specifically between circuit boards, circuit boards and processors Provide high-speed interfaces for communications between processors and peripherals on the board, as well as between chips and backplanes. The rapid development of telecommunication services and Internet services has further increased the demand for high-speed, high-performance transceiver chips. [0003] However, the data received and amplified at the receiving end of the transceiver is asynchronous and noisy. In order to ensure the synchronization o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/13
Inventor 陈慧宁张冰
Owner CHENGDU CORPRO TECH CO LTD
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