Method of modifying dynamic performance of phase-locked loop on basis of sliding filter

Abstract

The invention discloses a method of modifying dynamic performance of a phase-locked loop on basis of a sliding filter. The method includes: sampling three-phase grid voltage, and performing Park coordinate transform to obtain voltage components v<q> and v<d> in a two-phase dq rotating coordinate system; subjecting the voltage component v<d> to differentiation and then to dividing by an angular frequency parameter, and summing a quotient and the voltage component v<q> to obtain q ; subjecting q to differentiation and then to dividing by the angular frequency parameter, and summing a quotient and the voltage component v<d> to obtain d; subjecting d to the sliding filter to obtain a fundamental wave positive-sequence voltage amplitude V<1><+>; subjecting q to the sliding filter and a PI (proportion integration) regulator, and summing an output of the PI regulator and a preset angular frequency to obtain a grid voltage angular frequency , with the preset angular frequency being power frequency usually; subjecting to differentiation to obtain a grid voltage phase 1+; feeding back 1+ to the input end to finish closed-loop control. The method has the advantages that a proportional algorithm of input signal frequency changes is introduced to MAF-PLL (moving average filter-phase-locked loop), the lowest frequency fluctuation component in the PLL is eliminated, the window width of the MAF is decreased, and dynamic performance of the MAF-DLL is improved.

Description

technical field [0001] The invention relates to a method for improving dynamic performance of a phase-locked loop based on a sliding filter. Background technique [0002] With the development of power electronics and new energy technologies, technologies such as distributed generation grid connection, flexible AC transmission, active power filter, and flexible DC transmission have developed rapidly. In these technologies, the converter is often connected to the public node (Point of Common Coupling, PCC) of the power grid. For this reason, the grid fundamental positive sequence voltage information (such as phase and frequency) at the PCC must be acquired quickly and accurately in real time. [0003] Phase Locked Loop (Phase Locked Loop, PLL) is the main method to obtain the above information. A large number of literatures have proposed different PLL design methods, and the most widely used one is Single Synchronous Frame Phase Locked Loop (SRF-PLL). SRF-PLL can be applied ...

AI Technical Summary

Problems solved by technology

However, due to the limitation of the MAF window width, the system bandwidth of the phase-locked loop after the introduction of MAF is greatly reduced, which seriously affects the dynamic performance of the phase-locked loop.

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