Method for Improving Dynamic Performance of PLL Based on Sliding Filter

Abstract

The invention discloses a method for improving the dynamic performance of a phase-locked loop based on a sliding filter. After differentiation, divide by the angular frequency parameter, and then add it to vq to obtain the obtained vq, divide it by the angular frequency parameter, and then add it to vd to obtain the fundamental positive sequence voltage amplitude obtained after passing through the sliding filter The value will be obtained through the sliding filter and then through the PI regulator, the output of the PI regulator is added to the preset angular frequency to obtain the grid voltage angular frequency measured by the phase-locked loop. The preset angular frequency is usually the power frequency; the obtained Integrate to obtain the grid voltage phase measured by the phase-locked loop and feed back the obtained input terminal to complete the closed-loop control. This application introduces a proportional algorithm that varies with the frequency of the input signal into the MAF-PLL to eliminate the lowest frequency fluctuation component in the PLL, thereby reducing the window width of the MAF and improving the dynamic performance of the MAF-PLL.

Description

technical field [0001] The invention relates to a method for improving dynamic performance of a phase-locked loop based on a sliding filter. Background technique [0002] With the development of power electronics and new energy technologies, technologies such as distributed generation grid connection, flexible AC transmission, active power filter, and flexible DC transmission have developed rapidly. In these technologies, the converter is often connected to the public node (Point of Common Coupling, PCC) of the power grid. For this reason, the grid fundamental positive sequence voltage information (such as phase and frequency) at the PCC must be acquired quickly and accurately in real time. [0003] Phase Locked Loop (Phase Locked Loop, PLL) is the main method to obtain the above information. A large number of literatures have proposed different PLL design methods, and the most widely used one is Single Synchronous Frame Phase Locked Loop (SRF-PLL). SRF-PLL can be applied ...

AI Technical Summary

Problems solved by technology

However, due to the limitation of the MAF window width, the system bandwidth of the phase-locked loop after the introduction of MAF is greatly reduced, which seriously affects the dynamic performance of the phase-locked loop.

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