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Multi-beam signal interleaving digital down-conversion (DDC) method based on super-speed analog to digital conversion (ADC)

A digital down-conversion and analog-to-digital conversion technology, which can be used in analog-to-digital converters, multi-frequency modulation and conversion, etc., can solve problems such as low computing efficiency, and achieve the effects of low computing efficiency, saving computing resources, and improving computing efficiency.

Inactive Publication Date: 2015-11-04
CHINA ACADEMY OF SPACE TECHNOLOGY +1
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Problems solved by technology

[0004] The purpose of the present invention is to solve the problems of low matching and low operation efficiency between the A / D output rate and the down-conversion operating rate in traditional digital down-conversion, and proposes a multi-beam signal based on ultra-high-speed analog-to-digital conversion (ADC) Interleaving digital down-conversion method, through the signal interleaving sampling technology of high-speed chips, using parallel DDS structure and polyphase filter structure to realize the down-conversion of digital signals of high-speed data, and move the carrier frequency signal of the radio frequency GHz (up to 8GHz) frequency band to Baseband

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  • Multi-beam signal interleaving digital down-conversion (DDC) method based on super-speed analog to digital conversion (ADC)
  • Multi-beam signal interleaving digital down-conversion (DDC) method based on super-speed analog to digital conversion (ADC)
  • Multi-beam signal interleaving digital down-conversion (DDC) method based on super-speed analog to digital conversion (ADC)

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Embodiment

[0025] Taking the signal digital down-conversion system with the carrier frequency band as the radio frequency as an example, the specific implementation process of the present invention will be described.

[0026] In the above example, the carrier frequency is radio frequency, the carrier frequency is set to 8GHz, the high-speed analog-to-digital conversion chip EV10AQ190AVTPY is used, the sampling rate is 4.8Gbps, n=4, m=10, 1.2Gbps.

[0027] Step 1. The source sends out a radio frequency bandpass signal with a carrier frequency of 8GHz and enters the analog-to-digital conversion chip EV10AQ190AVTPY. The maximum sampling rate of the chip is 5Gbps, and the design sampling rate here is 4.8Gbps;

[0028] Step 2. Designed according to the characteristics of the chip EV10AQ190AVTPY, the four channels of the ADC perform four-channel interleaving sampling, and converting one channel of serial data with a sampling rate of 4.8Gbps to four channels of parallel interlaced data with a sampling ...

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Abstract

The invention relates to a multi-beam signal interleaving DDC method based on super-speed ADC, and belongs to the technical field of microwave signal measurement. According to the method, the signal interleaving processing technology of a high-speed chip and unique parallel-structure characteristics of a multi-phase filter are utilized, and frequency mixing and filtering are carried out at the end of low data processing speed under the condition that high real-time sampling rate is maintained. Signal interleaving of the high-speed ADC chip realizes RF signal collection and ADC, serial-to-parallel processing is carried out, and thus, rapid processing is realized while space is increased.

Description

Technical field [0001] The invention relates to a multi-beam signal interweaving digital down-conversion method based on ultra-high-speed analog-to-digital conversion (ADC), which belongs to the technical field of microwave signal measurement. Background technique [0002] With the development of high-speed sampling devices in recent years, direct sampling in the radio frequency band has become possible. The current development trend of digital receivers is to place the digital-to-analog converter ADC (A / D Converter) as close to the antenna as possible in order to digitize as much as possible in the subsequent processing, which requires A / D to have a high conversion rate and its The subsequent digital processing devices and circuit structure must follow the principles of high efficiency, effectiveness and speed. [0003] Digital down-conversion (DDC) is the first processing work to be completed after A / D sampling. This is also the most difficult part of the system and the largest ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03D7/16H03M1/12
Inventor 周慧郝时光曹桂兴宋哲王帅罗婧涂水平赵文静
Owner CHINA ACADEMY OF SPACE TECHNOLOGY
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