Space frequency two-dimensional spectrum estimation method based on compressed sampling array

A compression sampling, two-dimensional spectrum technology, applied in the field of signal processing, can solve the problems of power consumption, volume increase, data storage difficulties, etc.

Active Publication Date: 2015-12-16
XIDIAN UNIV
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Problems solved by technology

The system usually has a very high sampling rate and a large number of channels, which requires the use of a large number of high-speed analog-to-digital conversion ADCs and larger field programmable gate array FPGAs, resulting in a sharp in

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  • Space frequency two-dimensional spectrum estimation method based on compressed sampling array
  • Space frequency two-dimensional spectrum estimation method based on compressed sampling array
  • Space frequency two-dimensional spectrum estimation method based on compressed sampling array

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Embodiment Construction

[0047] The technical solutions and effects of the present invention will be further described in detail below with reference to the accompanying drawings.

[0048] refer to figure 1 , the implementation steps of the present invention are as follows:

[0049] Step 1: Adopt the N l The signals collected by the receiver of antennas are used as the input signal matrix X.

[0050] Such as figure 2 As shown, the implementation scenario of the present invention includes having N l A receiver with antennas, R incident signals.

[0051] The signal collected by all antennas is an N l ×N t The input signal matrix X, each antenna is defined as an array element, denoted as i, and the distance from array element i to array element 1 is d i , and assume that there are R signals simultaneously incident on the N l An array composed of antennas, the direction of arrival DOA angle of the incident signal is θ k , where, k=0,1,2,...,R-1, 1≤R≤N l , i=1,2,...,N l , N t is the total leng...

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Abstract

The invention discloses a space frequency two-dimensional spectrum estimation method based on a compressed sampling array, which mainly solves a problem that data storage is enabled to become extremely difficult because a surprising amount of data in conditions of a high sampling rate and multiple channels. Implementation of the method comprises the steps of 1) using signals acquired by receives of N1 antennas to act as an input signal matrix X; 2) generating an observation matrix Y according to the input signal matrix X; 3) constructing frequency domain basis matrix F, and setting a time domain compression matrix Phib and joint sparse matrix Zf according to the observation matrix Y, and establishing a signal model Y<T>=PhibFZf; 4) solving the signal model so as to acquire the joint sparse matrix Zf, and acquiring a non-zero support set Gamma according the joint sparse matrix; and 5) solving a space frequency two-dimensional spectrum Zp according to the non-zero support set Gamma. The method disclosed by the invention reduce the number of channels and the time domain sampling rate of the system, improves the transient signal receiving bandwidth and the direction finding precision, and can be applied to a radar and reconnaissance integration system.

Description

technical field [0001] The invention belongs to the technical field of signal processing, in particular to a space-frequency two-dimensional spectrum estimation method, which can be used in radar and reconnaissance integrated systems. Background technique [0002] In the radar and reconnaissance integrated system, the signals received by the antenna array enter the RF front-end of each channel respectively, and the RF front-end mainly performs functions such as low-noise amplification, variable gain control, frequency mixing, and intermediate frequency amplification. To function, the RF front-end needs to have better phase consistency. [0003] The intermediate frequency signal enters the digital signal processing subsystem from the RF front end. First, it undergoes analog-to-digital conversion and A / D conversion, and then sends it to the field programmable gate array FPGA, where cache and preprocessing are performed in the field programmable gate array FPGA; due to the syst...

Claims

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Application Information

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IPC IPC(8): G01S7/02
CPCG01S7/02
Inventor 鲍丹蔡晶晶秦国栋刘高高武斌李鹏冯小平高春芳
Owner XIDIAN UNIV
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