Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

LDO circuit

A circuit, capacitor technology, applied in the field of low dropout linear regulator circuit

Active Publication Date: 2015-12-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF7 Cites 17 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] figure 1 The disadvantage of the circuit structure shown is that the LDO output voltage V_LDO will produce overshoot when the power is turned on, and the LDO output voltage V_LDO is generally connected to a low-voltage device, and the overshoot LDO output voltage V_LDO will cause breakdown of subsequent low-voltage devices. and other adverse effects

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • LDO circuit
  • LDO circuit
  • LDO circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0035]first review as figure 1 Existing LDO circuit diagram shown; applicant's figure 1 The technical problems existing in the circuit shown are analyzed as follows, figure 1 The circuit shown in the figure only produces LDO output voltage overshoot during power-on, because it takes a certain amount of time for the feedback loop to stabilize, that is, it takes a certain amount of time for the nodes PG and PB to reach a stable value, and the node PG passes through The current flowing out of the PMOS tube PM1 increases the charging of the compensation capacitor Cc. During the power-on process, the current of the PMOS tube PM1 is small, so the charging current of the compensation capacitor Cc is small, so that the node PG rises faster during the power-on process. It should be less than the rising rate of the power supply voltage VCC, so the source-gate voltage of the PMOS transistor PM2 will maintain a large value during the power-on process, so that the PMOS transistor PM2 will...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an LDO circuit which comprises an overshoot restraining circuit and an LDO body circuit. The overshoot restraining circuit comprises a current comparator, a second PMOS tube, a first resistor, a first capacitor and a third PMOS tube. The current comparator compares the tail current of a differential amplifier of the LDO body circuit with the image current of a first active load. In the power-on process, the current comparator outputs a low level and makes the second PMOS tube powered on through the characteristic that the tail current is established earlier than the current of the first active load, the first capacitor is charged after the second PMOS tube is powered on, the grid voltage of the third PMOS tube is raised later than the supply voltage so that the third PMOS can be powered on, the grid voltage of the first PMOS tube at the output end of the LDO body circuit is changed together with the supply voltage after the third PMOS is powered on, and therefore the overshoot of the LDO output voltage in the power-on process is eliminated.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing, in particular to a low-dropout linear regulator (LDO) circuit. Background technique [0002] Such as figure 1 Shown is the existing LDO circuit diagram; the existing LDO circuit includes a differential amplifier, PMOS transistor PM2 and a resistor string composed of resistors R0 and R1. One input terminal of the differential amplifier is connected to the reference voltage VREF, and the other input terminal is connected to the resistor The series divides the LDO output voltage V_LDO to form the feedback voltage VFD, the drain of the PMOS transistor PM2 outputs the LDO output voltage V_LDO, and the source of the PMOS transistor PM2 is connected to the power supply voltage VCC. figure 1 The differential amplifier shown in includes a differential amplifier main circuit composed of NMOS transistors NM0 and NM1, an active load circuit composed of PMOS transistors PM0 and PM1, and a m...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
Inventor 周宁
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com