Timer IP (Intellectual Property) core connected with 8-bit microprocessor application system and method thereof for realizing timing control of timer

Abstract

The invention discloses a timer IP (Intellectual Property) core connected with an 8-bit microprocessor application system. The timer IP core comprises a data input / output and command word decomposition storage control module, a pulse 12 frequency divider, a timing processing control module, a timer overflow flag control module and an input gating selection control module. An FPGA (Field Programmable Gate Array) is applied to design the timer IP core formed by a hard connection control circuit, the timer IP core is provided with fourteen 16-bit timers, wherein twelve 16-bit timers can form six 32-bit timers, one command word sets a working mode and selects the reference clock frequency division multiple of the timer, and the other command word controls a working state. The program execution time of the 8-bit microprocessor is not occupied except that the 8-bit microprocessor carries out the operations, including function and state setting, timing parameter transmission and current timing value reading, on the timer. Each 16-bit / 32-bit timer has a function of automatically reloading the timing parameter, so that timing precision is improved. The requirements of the timing of a plurality of timers and the timing control of a system can be met.

Description

technical field [0001] The present invention relates to a timer IP core connected with an 8-bit microprocessor application system and a method for realizing timer timing control thereof, in particular to a feature based on FPGA parallel processing, which can be combined with FPGA designed hard-wired circuits A timer IP core connected to an 8-bit microprocessor application system and a method for realizing timer timing control. Background technique [0002] In large-scale time sequence control or other 8-bit microprocessor application systems that need to use many timers, a large number of timers will be used, and there are three ways to implement the expansion of the number of timers: the first way is to apply in the microprocessor The timing time of a timer is used as the reference time, and the timing interrupt method is used to program, and the timing multiple variable is set. The timing multiple variable is also the identification variable of the extended timer. There ar...

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Problems solved by technology

[0006] The third method is to use non-programmable hardware timing, and each timer is realized by an independent hardware circuit; using this method to realize the timing function, the more timers required, the larger the circuit scale and the maintenance workload.

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