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A system single event effect detection method and system based on parallel testing

A single event effect, parallel testing technology, applied in electronic circuit testing, non-contact circuit testing, single semiconductor device testing, etc., can solve the problems of unfavorable single event effect evaluation and inability to accurately separate, and achieve parallel test observation Real-time recording method to improve efficiency

Active Publication Date: 2016-09-28
NAT UNIV OF DEFENSE TECH
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AI Technical Summary

Problems solved by technology

The judgment conditions for the occurrence of single event effects are mainly judged by the system-defined changes in telemetry related to single events and abnormal system functions. The coverage of system telemetry definitions is related to the overall system design, which has certain limitations. However, the judgment of abnormal function has two main deficiencies: the first is that abnormal function may be the result of the joint action of multiple single-event errors, and the relationship between each single-event error and abnormal function cannot be accurately separated; Anomalies have a time-delay characteristic relative to the occurrence of single event errors, which is not conducive to the evaluation of the ability to resist single event effects

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  • A system single event effect detection method and system based on parallel testing
  • A system single event effect detection method and system based on parallel testing
  • A system single event effect detection method and system based on parallel testing

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Embodiment Construction

[0040] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0041] Such as figure 1 Shown, the system single event effect detection method based on parallel test of the present invention, its steps are:

[0042] S1: Build a parallel system;

[0043] Construct a parallel system for DSP and FPGA components, the core components of the system under test, and the input and output of the DSP and FPGA of the parallel system are exactly the same as the input system of the system under test.

[0044] S2: Build a test system;

[0045] The two system signal processing platforms run the same program to ensure that the inputs of the two platforms are the same; that is, connect the two parallel systems, manage the test unit, host computer, power supply and signal source, etc., and output the output of the system under test and the parallel system ( Digital quantity format) input into the management test ...

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Abstract

A system single event effect detection method and system based on parallel testing, the steps of the method are: S1: Construct a parallel system; construct a parallel system for the core components DSP and FPGA components of the system to be tested, and input the DSP and FPGA of the parallel system The output and the input system of the system to be tested are exactly the same; S2: build the test system; run the same program on the two system signal processing platforms to ensure that the inputs of the two platforms are the same; S3: start the test; the device or module of the signal processing platform to be tested Irradiate, the parallel system does not irradiate, monitor the output and key parameters of the two platforms; S4: processing; when the digital output or key parameters of the two platforms change, the current internal state information, key parameters, output The signal is stored; S5: the result. The system is used to implement the method described above. The invention has the advantages of better real-time performance, higher precision, easier operation and the like.

Description

technical field [0001] The present invention mainly relates to the field of space electronic systems, in particular to a system single event effect detection method and system based on parallel testing, which can detect typical large-scale integrated circuits (Digital Signal Processor, DSP for short, and Field Programmable Gate Array for short) of space electronic systems. FPGA) is tested for its anti-single event effect capability to provide technical support for its anti-radiation hardening design. Background technique [0002] SRAM (Static Random Access Memory) FPGA has powerful digital signal processing capability and programmable capability, so it is widely used in space digital signal processing platform and is one of the core components of space electronic system. SRAM type FPGAs are susceptible to space radiation effects, among which the single event effect of FPGA has the most significant impact on system functions. The single event effect of FPGA may lead to logic ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/307G01R31/26
Inventor 杨建伟杨俊王跃科邢克飞胡梅何伟杨道宁
Owner NAT UNIV OF DEFENSE TECH