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A kind of signal glitch elimination circuit

A technology for eliminating circuit and burrs, applied in logic circuits, multiple input and output pulse circuits, electrical components, etc., can solve the problems of increasing area and affecting the accuracy of circuit burr elimination, so as to improve the scope of application and improve the accuracy of burr elimination , to ensure the effect of normal work

Active Publication Date: 2018-03-16
WILL SEMICON (SHANGHAI) CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, the commonly used RC low-pass filter plus Schmitt trigger method, only by increasing the value of RC can the width of the glitch elimination be increased, but increasing the value of RC will increase the area
In addition, due to the voltage reversal characteristics of the Schmitt trigger, the amplitude of the input signal and the supply voltage of the Schmitt trigger can seriously affect the glitch removal accuracy of the circuit.

Method used

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  • A kind of signal glitch elimination circuit
  • A kind of signal glitch elimination circuit
  • A kind of signal glitch elimination circuit

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Embodiment Construction

[0030] The technical solutions of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

[0031] figure 1 A schematic diagram of a traditional signal glitch removal circuit, such as figure 1 As shown, the circuit includes a resistive load, a capacitor, a Schmitt trigger, and an inverter. The traditional signal glitch elimination circuit filters the glitch noise below a certain pulse width by means of RC low-pass filter filtering and Schmitt trigger.

[0032] figure 2 It is the timing diagram under the normal input signal of the traditional signal glitch removal circuit, such as figure 2 As shown, the filter bandwidth is designed to be 250nS. Under normal circumstances, the traditional circuit can filter out the glitch noise with a pulse width of 200nS, while retaining the signal with a pulse width of 300nS.

[0033] image 3 It is the timing diagram of the different power supply input signal for the ...

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Abstract

The present invention relates to a signal glitch elimination circuit, which comprises: a comparator unit, a reference voltage selection unit and a glitch elimination unit; wherein, the comparator unit is used to compare the received input signal with the reference voltage, and generate a first output signal output; the reference voltage selection unit is used to receive the input first reference voltage and the second reference voltage, while receiving the second output signal of the glitch elimination unit, and output the generated reference voltage; the glitch elimination unit is used to receive the first outputting the signal, and outputting the generated second output signal to the outside, and outputting to the reference voltage selection unit. The signal burr elimination circuit provided by the invention can overcome the deficiencies of the prior art and improve the accuracy of signal burr elimination while reducing the area.

Description

technical field [0001] The invention relates to a technology for processing signal burrs, in particular to a signal burr elimination circuit. Background technique [0002] In a general signal burr elimination circuit, if you want to eliminate a wider burr, you need to increase the area, and the elimination effect depends heavily on the amplitude of the input signal and the power supply voltage of the receiving circuit. For example, in the commonly used RC low-pass filter plus Schmitt trigger, only by increasing the value of RC can the width of glitch elimination be increased, but increasing the value of RC will increase the area. In addition, due to the voltage reversal characteristic of the Schmitt trigger, both the amplitude of the input signal and the power supply voltage of the Schmitt trigger can seriously affect the burr elimination accuracy of the circuit. Contents of the invention [0003] The object of the present invention is to provide a circuit for eliminating...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/22H03K19/094
Inventor 林鹏程
Owner WILL SEMICON (SHANGHAI) CO LTD
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