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A high-speed fir filter implementation method based on segmented parallel processing

An implementation method and parallel processing technology, which is applied in the field of signal processing, can solve problems such as filter design rate mismatch, and achieve the effects of reducing loss, simple implementation, and high promotion value

Active Publication Date: 2017-12-15
THE 724TH RES INST OF CHINA SHIPBUILDING IND
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Problems solved by technology

[0006] Compared with the prior art, the present invention has the remarkable advantages that: the present invention adopts the high-speed FIR filter method designed by the segmented parallel processing technology to solve the problem of mismatching filter design rate in low-speed processing devices under high sampling rate; and the method The parallel processing structure is adopted to reduce the loss of logic resources; the method is simple to implement, widely used, and has high promotion value

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  • A high-speed fir filter implementation method based on segmented parallel processing

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Embodiment Construction

[0009] A block diagram of a high-speed FIR filtering implementation method based on segmented parallel processing technology of the present invention can be found in figure 1 . The specific implementation steps are as follows:

[0010] Step 1, set the filter coefficients to be m, and use the MATLAB filter design tool FDATOOL tool to generate FIR filter coefficients A that match the sampling rate 1 …A m , where m is a positive integer. Instantiate m constant multipliers in a programmable logic device, A 1 …A m Fixed constant as a constant multiplier; instantiates these m constant multipliers as a multiplier bank.

[0011] Step 2: Segment the A / D output data in a sliding window manner. Each piece of data is sorted in the order of input time, and the current piece of data is obtained by shifting out the oldest data of the previous piece of data. Use the above principles to obtain 2m data segments with a length of m and store them in the memory;

[0012] Step 3. According ...

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Abstract

The invention discloses a high-speed FIR filter implementation method based on segmented parallel processing, which includes: first, adopting a sliding window method to segment high data rate data, and the segmented data must meet two requirements: (1) the current data The segment only moves out the oldest data of the previous data segment; (2) according to the parallel FIR filter structure, the length of each segment of data should be equal to the length of the filter coefficient; secondly, the same working clock, the number of processed data segments is the number of filter coefficients This method can not only meet the requirements of the delay unit of the parallel FIR filter structure, but also obtain the filtering results of the square of the number of filter coefficients at the same time, which reduces the system working speed.

Description

technical field [0001] The invention belongs to signal processing technology, in particular to a method for realizing high-speed FIR filtering in low-speed programmable devices. It mainly solves the problem that the high data rate caused by the high sampling rate and the processing speed of the real-time processing device are relatively low and cannot be used for real-time FIR filtering. Background technique [0002] For the sampling processing of large bandwidth signals, there is usually a contradiction between the high data rate caused by high sampling rate and the relatively low processing speed of real-time processing devices. Its essence is: for a broadband signal with a bandwidth of more than 500 megabits, the A / D converter needs to have a sampling rate higher than twice the bandwidth according to the law of band-pass sampling, and its sampling rate is usually higher than gigatimes per second; and for Programmable logic devices for real-time processing, usually the sy...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03H17/02
Inventor 奚俊江晓竹尚娟
Owner THE 724TH RES INST OF CHINA SHIPBUILDING IND
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