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Manufacturing method of flash memory structure

A manufacturing method and technology of flash memory, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problems that the yield rate of flash memory structure needs to be improved, and achieve the effect of improving yield rate and avoiding damage

Active Publication Date: 2016-02-17
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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AI Technical Summary

Problems solved by technology

[0004] However, the yield rate of the flash memory structure in the prior art needs to be improved

Method used

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  • Manufacturing method of flash memory structure
  • Manufacturing method of flash memory structure
  • Manufacturing method of flash memory structure

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Experimental program
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Embodiment Construction

[0022] It can be seen from the background technology that the yield of the flash memory structure formed by the prior art needs to be improved. The reason is analyzed in combination with the manufacturing method of the prior art flash memory structure. reference Figure 1 to Figure 4 , Shows a schematic diagram of the structure corresponding to each step of the manufacturing method of the prior art flash memory structure. The manufacturing method of the flash memory structure includes the following steps:

[0023] reference figure 1 , A substrate 100 is provided. A gate structure (not labeled) is formed on the surface of the substrate 100, a hard mask layer 130 located on a part of the gate structure, and penetrates the gate structure and the hard mask layer 130 and expose the trench 160 on the surface of the substrate 100, the protective sidewall 140 on the sidewall surface of the hard mask layer 130 located in the trench 160, and the protective sidewall 140 located in the tren...

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Abstract

A manufacturing method of a flash memory structure includes the steps of providing a substrate; forming a gate structure on the substrate, wherein the gate structure comprises a floating gate layer, and a control gate layer located on the floating gate layer; forming a hard mask layer on the gate structure; etching the gate structure with the hard mask layer as a mask, and forming an opening in the control gate layer; forming a side wall structure on the side wall of the opening; etching the floating gate layer with the hard mask layer and the side wall structure as masks, and forming a groove which penetrates through the gate structure and the hard mask layer and is exposed out of the surface of the substrate; forming a word line in the groove; forming a medium layer covering the surfaces of the word line and the side wall structure; removing the hard mask layer. The medium layer covering the surfaces of the word line and the side wall structure is formed and used for protecting the side wall structure, it is avoided that the side wall structure is exposed outwards after the word line is formed in the groove, and therefore damage caused by the subsequent process of removing the hard mask layer to the side wall structure is avoided, and the yield of the flash memory structure is improved.

Description

Technical field [0001] The present invention relates to the field of semiconductors, and in particular to a manufacturing method of a flash memory structure. Background technique [0002] In the current semiconductor industry, integrated circuit products can be divided into three main types: analog circuits, digital circuits, and digital / analog hybrid circuits. Among them, storage devices are an important type of digital circuits. Among storage devices, flash memory (Flash Memory, flash memory for short) has developed particularly rapidly in recent years. The main feature of flash memory is that it can maintain stored information for a long time without power on; and it has the advantages of high integration, fast access speed, easy erasing and rewriting, etc., so it is obtained in many fields such as microcomputers and automatic control. It has a wide range of applications. [0003] The flash memory structure is different from the conventional MOS transistor structure. The gate...

Claims

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Application Information

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IPC IPC(8): H01L21/8247H01L21/28H10B69/00
CPCH01L21/28H10B41/00H10B69/00
Inventor 张怡
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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