Test structure, manufacturing method of the test structure and test method

Abstract

The invention discloses a test structure, a manufacturing method of the test structure and a test method. The test structure comprises a gate structure, at least two groups of contact hole structure units and at least two layers of metal layers, wherein the at least two groups of contact hole structure units are arranged on an active area of one side of the gate structure; each group of contact hole structure units comprises at least one contact hole structure; the at least two layers of metal layers are arranged on a surface of each group of the contact hole structure units and are arranged with the contact hole structure units in a one-to-one correspondence mode. In the test structure, the metal layers on any two groups of contact hole structure units are taken as probe contact points during a resistance test so as to obtain a source-drain resistance in the test structure so that a structure difference between the test structure and a real device, which is generated because the gate structure is not formed in the test structure, is reduced; and further a difference between the source-drain resistance in the test structure and a source-drain resistance in the real device is reduced and measured value accuracy of the source-drain resistance in the test structure is increased.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuits, in particular, to a test structure, a method for manufacturing the test structure, and a test method. Background technique [0002] In the manufacturing process of semiconductor devices, it is necessary to precisely control the source-drain resistance (source region resistance Rs or drain region resistance Rd) of transistors (real transistors) in the device region, so that the performance of the real transistor (such as saturation current) can reach the designed Require. Currently, by precisely controlling the source-drain implantation and the process conditions for forming metal silicide (such as NiSi), the source-drain resistance in the formed real transistor can be accurately controlled. After the fabrication of the above-mentioned semiconductor device is completed, it is necessary to measure the source-drain resistance in the real transistor, and compare t...

AI Technical Summary

Problems solved by technology

However, it is usually difficult to accurately separate the channel resistance and the source-drain resistance, so that the calculated source-drain resistance is quite different from the source-drain resistance in the real transistor.

Especially in advanced technologies such as 45nm and below, the separation of channel resistance and source-drain resistance is more difficult and inaccurate, making the difference between the calculated source-drain resistance and the source-drain resistance of real transistors larger

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