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High-voltage semiconductor element

A semiconductor, high-voltage technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc.

Active Publication Date: 2016-02-17
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

That is to say, under the high-voltage operation of the MOS transistor, the maximum operating voltage of the MOS transistor may be lower than its breakdown voltage due to the influence and limitation of the threshold voltage (Vth) of the parasitic field element being turned on.
[0003] However, the improvement of the breakdown voltage and the reduction of the on-resistance have always been two important characteristics that are difficult to achieve.

Method used

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Embodiment Construction

[0049] In an embodiment of the present invention, a high voltage semiconductor device is proposed. In an embodiment, the P-type doped layer is disposed in a region below the first P-type well and the drift region, which can reduce the on-resistance of the high-voltage semiconductor device and maintain its high breakdown voltage. However, the embodiments are only used for illustration and shall not limit the scope of protection of the present invention. In addition, the drawings in the embodiments omit some important components to clearly show the technical characteristics of the present invention.

[0050] figure 1 A schematic cross-sectional view of a high-voltage semiconductor device 100 according to an embodiment of the present invention is shown. Such as figure 1 As shown, the high voltage semiconductor device 100 includes a P-type substrate 110 , a high voltage N-type well (HVNW) 120 , a first P-type well 130 , a drift region 140 and a P-type doped layer 150 . A high ...

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Abstract

The invention discloses a high-voltage semiconductor element, which comprises a P-type substrate, a high-voltage N-type well (HVNW), a first P-type well, a drift region (drift region) and a P-type doped layer, wherein the high-voltage N-type well is formed in the P-type substrate; the first P-type well is formed in the high-voltage N-type well; a first depth is formed between the bottom of the first P-type well and the surface of the P-type substrate; the drift region is formed in the high-voltage N-type well and extends downwards from the surface of the P-type substrate; the P-type doped layer is formed in the P-type substrate; a second depth is formed between the bottom of the P-type doped layer and the surface of the P-type substrate; the second depth is greater than the first depth; and the P-type doped layer is formed in a region below the first P-type well and the drift region.

Description

technical field [0001] The present invention relates to a high-voltage semiconductor device, and in particular to a high-voltage semiconductor device with high breakdown voltage and low resistance. Background technique [0002] In recent decades, the semiconductor industry has continued to shrink the size of semiconductor structures while simultaneously improving speed, performance, density, and unit cost of integrated circuits. For high-voltage or ultra-high-voltage semiconductor components (such as metal oxide semiconductor MOS), when the metal line is connected to the component in the silicon process, the problem of turning on the parasitic field element will be induced in some areas where the metal line crosses. . That is to say, under the high voltage operation of the MOS transistor, the maximum operating voltage of the MOS transistor may be lower than its breakdown voltage due to the influence and limitation of the threshold voltage (Vth) of the turned-on parasitic fi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/7816H01L29/0878H01L29/0634H01L29/1083H01L29/42368H01L29/66689
Inventor 詹景琳林正基吴锡垣
Owner MACRONIX INT CO LTD