Wafer-level preparation method of glass substrate integrating chip heat dissipation structure and passive devices
A technology of passive devices and heat dissipation structures, applied in the direction of microstructure technology, microstructure devices, manufacturing microstructure devices, etc., can solve the problems of device performance and system integration, such as adverse effects, and achieve good heat dissipation, improve system performance, The effect of saving surface space
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[0035] A wafer-level preparation method for a glass substrate integrating a chip heat dissipation structure and passive devices, comprising the following steps:
[0036] Step 1, dry etching the silicon wafer to form a silicon mold wafer 1, so that the silicon mold wafer 1 contains an array of grooves 2 containing embedded passive device structure mold 3, such as figure 1 As shown, the unetched silicon between the groove array 2 is used for subsequent dry etching. Among them, the thickness of the silicon wafer is 525um; the dry etching is deep reactive ion etching, and the etching depth is 300um. The shape of the groove array 2 includes a zigzag column, a square spiral column, a hexagonal spiral column, an octagonal spiral column, a circular spiral column, or a double cuboid, or a coaxial double annular column.
[0037] Step 2, using the silicon substrate as the seed layer, electroplating copper to fill the groove array 2, and electroplating copper to form a buried passive dev...
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