FRAM (ferroelectric random access memory) unit connected with DSP (serial peripheral interface) by adopting SPI (serial peripheral interface) as interface

A technology of interface and port, applied in the field of DSP digital signal processing system, can solve the problems of slow reading and writing speed of NORFLASH, tension of EMIF interface, etc., and achieve the effect of saving I/O ports and space, increasing reading and writing speed, and improving utilization rate

Inactive Publication Date: 2016-03-23
天津浩丞恒通科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Traditional methods are mostly (such as Figure 1 As shown) Connect NORFLASH to the EMIF port to store these data. It is well known that the read and write speed of NORFLASH is very slow; or (such as Figure II As shown) connect parallel FRAM to the EMIF port. Although this method effectively solves the problem of read and write speed, most DSP EMIF interfaces are very tight.

Method used

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  • FRAM (ferroelectric random access memory) unit connected with DSP (serial peripheral interface) by adopting SPI (serial peripheral interface) as interface
  • FRAM (ferroelectric random access memory) unit connected with DSP (serial peripheral interface) by adopting SPI (serial peripheral interface) as interface
  • FRAM (ferroelectric random access memory) unit connected with DSP (serial peripheral interface) by adopting SPI (serial peripheral interface) as interface

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Embodiment Construction

[0017] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0018] The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0019] A kind of FRAM connected with DSP with SPI as interface, such as image 3 Shown, comprise DSP and SPI, the port GPIO of described DSP is connected with the port master input data line / SS on SPI as the chip selection port, and an I / O port of described DSP is connected with the clock signal SCLK of SPI as clock signal , the port MCBSP of the DSP is connected to the master input data line MISO of the SPI.

[0020] Such as Figure 4 Shown, comprise DSP, SPI and FRAM, described SPI is as the medium of DSP and FRAM, and the port host input data line MISO of SPI is connected with the port MCBSP of described DSP, and the port host output data line MOSI of described SPI is connected with...

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Abstract

The invention provides an FRAM (ferroelectric random access memory) unit connected with a DSP (serial peripheral interface) by adopting an SPI (serial peripheral interface) as an interface. The FRAM unit comprises the DSP, the SPI and FRAMs, wherein the SPI is taken as a medium of the DSP and the FRAMs, a port MISO of the SPI is connected with a port MCBSP of the DSP, a port MOSI of the SPI is connected with a port SO of each FRAM, a serial clock line SCLK of the SPI is connected with a clock signal SCK on each FRAM, a chip select signal/SS of the SPI is connected with a chip select signal/CS on each FRAM, multiple FRAMs can be connected to the outside of the SPI in parallel, and the model of each FRAM is FM25H20. The FRAM unit is connected with the DSP by adopting the SPI as the interface, so that not only is I/O (input/output) space of the DSP saved, but also the read-write speed of the DSP on a nonvolatile memory is greatly increased.

Description

technical field [0001] The invention belongs to the field of DSP digital signal processing systems, and in particular relates to a FRAM connected with DSP by using SPI as an interface. Background technique [0002] Digital signal processing is a technical discipline that studies the analysis, transformation, filtering, detection, modulation, demodulation and fast algorithm of signals by digital methods. During this process, some non-volatile storage media is needed to save the data. [0003] Traditional methods are mostly (such as Figure 1 As shown) Connect NORFLASH to the EMIF port to store these data. It is well known that the read and write speed of NORFLASH is very slow; or (such as Figure II As shown) connect parallel FRAM externally to the EMIF port. Although this method effectively solves the problem of read and write speed, the EMIF interface of most DSPs is very tight. Contents of the invention [0004] In view of this, the present invention aims to propose a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
CPCG06F3/061G06F3/0611
Inventor 王睿
Owner 天津浩丞恒通科技有限公司
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