Semiconductor device, manufacturing method therefor, and electronic device

A technology for semiconductors and devices, applied in the field of semiconductor devices and their preparation, can solve the problems of difficult control of the height of metal gates, uneven height of metal gates, reduced device performance and yield, etc., to improve residual problems, improve uniformity, Improve the effect of control
CN105448682AInactive Publication Date: 2016-03-30SEMICON MFG INT (SHANGHAI) CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SEMICON MFG INT (SHANGHAI) CORP
Publication Date
2016-03-30
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention relates to a semiconductor device, a manufacturing method therefor, and an electronic device. The method comprises the steps: providing a substrate, and forming a virtual grid, a gap wall layer and / or contact hole etching stop layer located on a side wall of the virtual grid, and an interlayer dielectric layer which covers the gap wall layer and / or contact hole etching stop layer; carrying out flattening from the interlayer dielectric layer to the virtual grid; carrying out the back etching of the gap wall layer and / or contact hole etching stop layer; removing the virtual grid and then forming a metal grid; and carrying out flattening from the metal grid to the gap wall layer and / or contact hole etching stop layer. The method is characterized in (1), improving the determination of a flattening end point signal of the metal grid, so as to improve the control of the height of the grid, and to improve the height uniformity of the metal grid; (2), improving a residue problem of the metal grid; (3), enlarging the technological window of the rear grid process of the metal grid.
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Description

technical field

[0001] The present invention relates to the field of semiconductors, in particular, the present invention relates to a semiconductor device, a preparation method thereof, and an electronic device. Background technique

[0002] In the field of integrated circuit manufacturing, as the size of MOS transistors continues to shrink, the impact of the physical limits of devices is also increasing, and it becomes more difficult to scale down the feature size of devices. Among them, MOS transistors and their circuits The manufacturing field is prone to leakage problems from the gate to the substrate.

[0003] The current method to solve the above problems is to replace the conventional polysilicon gate structure with high-K metal gates in semiconductor devices. At present, most of the formation methods of metal gates adopt the gate-last process. For example, a dummy gate is formed first, then an interlayer dielectric layer is deposited to cover the dummy gate, and fi...

Claims

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