Method for forming semiconductor device

A semiconductor and device technology, applied in the field of semiconductor device formation, can solve problems such as failure to meet the development requirements of semiconductor devices, poor performance of semiconductor devices, etc., and achieve the effect of reducing performance and reducing adverse effects

Active Publication Date: 2016-03-30
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the performance of the semiconductor device after the interconnection structure formed b

Method used

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  • Method for forming semiconductor device
  • Method for forming semiconductor device
  • Method for forming semiconductor device

Examples

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Example Embodiment

[0045] As mentioned in the background technology, the performance of the semiconductor device after the interconnection structure formed by the existing process cannot meet the needs, and the reason is analyzed: combined with reference Figure 1 to Figure 6 .

[0046] In the formation process of the existing interconnect structure, a first through hole 15 is formed in the first dielectric layer 14, and a first metal layer filling the first through hole 15 is formed on the first dielectric layer 14 After 16 , CMP is used to remove the redundant first metal layer 16 on the first dielectric layer 14 , so as to form a first conductive plug 17 in the first through hole 15 . Wherein, in the CMP process, after the polishing pad removes the first metal layer 16 on the first dielectric layer 14, it is also easy to remove the first dielectric layer 14 with a partial thickness, but the grinding rate based on the first conductive plug 17 is much lower than that of the first dielectric layer...

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Abstract

The invention provides a method for forming a semiconductor device, comprising the following steps: forming a first dielectric layer on a substrate, and forming a barrier layer on the first dielectric layer; etching the barrier layer and the first dielectric layer to form first through holes which expose the source or drain of a first transistor on the substrate; and after a first conductive layer filling the first through holes is formed, adopting a planarization process to remove the first conductive layer on the barrier layer, and forming first conductive plugs in the first through holes. In the planarization process, the barrier layer as a stop layer can avoid damage to the first dielectric layer and avoid the problem that an apparent 'dishing structure' is formed on the surface of the first dielectric layer due to the damage to the first dielectric layer, thus improving the performance of the formed semiconductor device.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a semiconductor device. Background technique [0002] With the development of semiconductor technology, the integration level of semiconductor devices continues to increase, and the feature size (Critical Dimension, CD) of semiconductor devices becomes smaller and smaller. [0003] In order to improve the integration of semiconductor devices, the semiconductor elements on a semiconductor wafer have a multi-layer structure. The connection structure realizes electrical connection. [0004] Figure 1 ~ Figure 4 A structural schematic diagram of a specific example for the formation process of the existing interconnection structure, including: [0005] first reference figure 1 , forming semiconductor elements such as a plurality of transistors 11, 12 on the substrate 10 (it is worth noting that the functions of the transistor 11 and the transistor 12 ar...

Claims

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Application Information

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IPC IPC(8): H01L21/768
Inventor 黄敬勇张城龙
Owner SEMICON MFG INT (SHANGHAI) CORP
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