Baseband signal processing circuit

Abstract

The invention discloses a baseband signal processing circuit which comprises a level adjusting circuit used for converting input signals into first level signals, a filter circuit used for filtering the first level signals and outputting filtered signals, and a differential circuit used for converting the filtered signals into differential signals. On one hand, the converted signals can be input into a modulation chip directly, so that a DAC chip is eliminated, the cost is lowered, and power consumption is reduced; and on the other hand, as the baseband signal processing circuit provided by the invention can filter signals directly, the complexity caused by arranging of a software filter in an FPGA is lowered, and the logical resource of the FPGA is saved.

Description

technical field [0001] The present application relates to the technical field of satellite navigation / positioning, and in particular to a positioning solution method and a receiver using the positioning solution method. Background technique [0002] In the field of communication, quadrature modulation (such as QPSK, 16QAM, etc.) is often used for signal transmission for baseband signals. The baseband signal processing part of this modulation method first divides the original signal into IQ two-way analog signals, modulates on the local oscillator signal through the modulation chip, and then transmits it on the channel. [0003] Most of the existing baseband signal processing methods are composed of FPGA and DAC. The FPGA generates IQ two-way parallel digital signals, and the DAC generates two-way analog signals. After passing through the driver chip, it is input into the modulation chip, and then transmitted on the channel. [0004] However, the existing baseband signal pro...

AI Technical Summary

Problems solved by technology

[0004] However, the existing baseband signal processing methods all adopt the architecture combining FPGA and DAC, which has high cost and high power consumption.

Moreover, in the existing method, the parallel data interface of the DAC occupies more pin resources of the FPGA, and the baseband signal needs to be shaped and filtered inside the FPGA, which also occupies more logic resources of the FPGA.

Images