Voltage buffer applied to SAR (Successive Approximation Register) ADC (Analog to Digital Converter)

A voltage buffer, voltage buffer technology, applied in the direction of instruments, electrical components, adjusting electrical variables, etc., to achieve the effect of small output resistance, low static power consumption, and short settling time

Inactive Publication Date: 2016-04-20
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Generally, the stronger the driving capability of the voltage buffer, the higher its quiescent current, which will generate a lot of quiescent power consumption

Method used

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  • Voltage buffer applied to SAR (Successive Approximation Register) ADC (Analog to Digital Converter)
  • Voltage buffer applied to SAR (Successive Approximation Register) ADC (Analog to Digital Converter)
  • Voltage buffer applied to SAR (Successive Approximation Register) ADC (Analog to Digital Converter)

Examples

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Embodiment Construction

[0023] The present invention will be further described below in conjunction with the accompanying drawings.

[0024] Such as figure 1 Shown is the overall block diagram of the voltage buffer applied to SARADC, including the error amplifier, voltage buffer output circuit and level detection circuit, and the DC power supply VDD supplies power to the error amplifier, voltage buffer output circuit and level detection circuit at the same time.

[0025] The first input terminal of the error amplifier is connected to the reference voltage Vin provided by the outside (bandgap reference), the second input terminal is connected to the reference voltage VREF output by the voltage buffer output circuit, the third input terminal is connected to the external bias voltage VB4, and the fourth input terminal is connected to the external bias voltage VB4. The input terminal is connected to the external bias voltage VB1, the fifth input terminal is connected to the external bias voltage VB2, and...

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Abstract

The invention discloses a voltage buffer applied to an SAR (Successive Approximation Register) ADC (Analog to Digital Converter). The voltage buffer comprises an error amplifier, a voltage buffer output circuit and a level detection circuit, wherein the voltage buffer is used for providing a reference voltage to a capacitive DAC of the SAR ADC, has high capability of driving a large-capacitance load, and can meet the requirement that the reference voltage needs to quickly restore due to a change of the capacitance load. The voltage buffer also has rapid starting capability; required reference voltage can be quickly built by the voltage buffer when the circuit is electrified to start, and the time that the SAR ADC enters a normal working state from a dormant state is shortened, so that the response speed of the SAR ADC is improved. Compared with a traditional voltage buffer applied to the SAR ADC, the voltage buffer disclosed by the invention has the advantages that the capability of driving the capacitance load is higher, and the power consumption is lower.

Description

technical field [0001] The invention relates to a reference voltage buffer applied to a high-speed and high-precision SARADC, belonging to the field of reference sources of analog-to-digital converters. Background technique [0002] For the successive approximation register analog-to-digital converter (SARADC), 70%-80% of its circuit design should focus on the design of the reference source circuit, which is also a problem that designers often overlook. [0003] Compared with other types of analog-to-digital converters, such as pipelineADC or sigma-deltaADC, SARADC has high requirements for driving the reference source. Especially in high-speed and high-precision applications, the driving capability of the reference source directly affects the performance of SARADC. It is worth noting that during the entire sampling conversion cycle, SARADC needs to extract a charge from the circuit of the signal, and at least N times of charge must be extracted from the reference source (N ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56H03M1/38
CPCG05F1/56H03M1/38
Inventor 吴建辉吴爱东杜媛李红陈超
Owner SOUTHEAST UNIV
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