High-speed output interface circuit, high-speed input interface circuit and data transmission method

Abstract

The embodiment of the invention provides a high-speed output interface circuit, a high-speed input interface circuit and a data transmission method. The high-speed output interface circuit and the high-speed input interface circuit are arranged in a high-speed output interface and a high-speed input interface respectively. The high-speed output interface circuit and the high-speed input interface circuit are both applied to a protocol stack used for rapid input and output transmission. The protocol stack comprises a link layer, a logic layer, a transmission layer and a physical layer. A link layer circuit in the high-speed output interface circuit packages link layer information in data, a packaging module further packages the data, the high-speed output interface sends a packaged message to a receiving end, the high-speed input interface in the high-speed input interface circuit receives the message sent by a sending end, an unpackaging module unpackages the message, the link layer circuit conducts link layer unpackaging on the message, the link layer information is obtained, the message is recombined according to the link layer information, and a complete data packet is obtained. By means of the high-speed output interface circuit, the high-speed input interface circuit and the data transmission method, software expenses of the receiving end and the sending end of the data packet are reduced, and the processing efficiency of a processor is improved.

Description

technical field [0001] Embodiments of the present invention relate to communication technologies, and in particular to a high-speed output and input interface circuit and a data transmission method. Background technique [0002] The high-speed input and output protocol (hereinafter referred to as RapidIO) is a high-performance, low-pin-count, interconnection architecture based on packet switching. It is an open interconnection system designed to meet the needs of current and future high-performance embedded systems. even technical standards. RapidIO is mainly used in the internal interconnection of embedded systems, supports chip-to-chip, board-to-board communication, and can be used for standby board connections of embedded devices. [0003] In the prior art, data transmission is usually performed based on the message passing mode of RapidIO. The messages of RapidIO's messaging mode support a maximum transmission of 4KB (kilobits). If a data packet has a large flow of dat...

AI Technical Summary

Problems solved by technology

[0004] However, in the message passing mode in the prior art, since the data packet needs to be split and reassembled by running software through the processor, the software overhead of the receiving end and the sending end is large, resulting in low processing efficiency of the processor

Images