Contacts for Highly Scalable Transistors
A contact and contact layer technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of increasing device performance and limiting the inherent performance of devices
Active Publication Date: 2019-09-13
TAIWAN SEMICON MFG CO LTD
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Problems solved by technology
However, as transistor device structures scale down and become three-dimensional, transistor contact resistance exhibits an increased impact on device performance
Transistor contact resistance in highly scaled multi-gate FETs can limit intrinsic device performance by well over 50% in conventional contact formation schemes
Method used
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[0020] The following disclosure provides many different embodiments or examples for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first component over or on a second component may include embodiments in which the first component and the second component are in direct contact, and may include additional components formed between the first component and the second component An embodiment such that the first part and the second part are not in direct contact. In addition, the present invention may repeat reference numerals and characters in various instances. This repetition is for the purposes of simplicity and clarity, and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.
[0021] Also,...
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A semiconductor device and a method of forming the same are disclosed. A semiconductor device includes: a substrate, first and second source / drain (S / D) regions, a channel between the first and second S / D regions, a gate bonded to the channel, and a gate connected to the first A contact part of the S / D area. The contact part includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S / D region on at least two sides thereof. In an embodiment, the first contact layer directly contacts three or four sides of the first S / D region to increase a contact area. The first contact layer includes one of a semiconductor-metal alloy, a III-V semiconductor, and germanium. Embodiments of the present invention relate to contacts for highly scaled transistors.
Description
[0001] Cross References to Related Applications [0002] This application claims the benefit of U.S. Provisional Application No. 62 / 081,348, filed November 18, 2014, entitled "Contacts for Highly Scaled Transistors," which is incorporated herein by reference in its entirety. technical field [0003] Embodiments of the present invention relate to contacts for highly scaled transistors. Background technique [0004] The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs, each with smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (ie, the number of interconnected devices per chip area) has generally increased, while geometry size (ie, the smallest component (or line) that can be created using a fabrication process) has decreased. This scaled-down process often provides benefits by increasing product...
Claims
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IPC IPC(8): H01L29/06H01L29/66H01L29/78
CPCH01L29/0603H01L29/66795H01L29/785H01L29/41791H01L29/775H01L29/78696H01L29/42392H01L29/41733H01L23/485H01L29/78618H01L29/66666H01L29/78642H01L29/45H01L21/76852H01L23/5226H01L23/5283H01L23/53271H01L29/41741H01L29/7827H01L29/7853H01L2029/7858
Inventor 卡洛斯·H·迪亚兹吴忠政张家豪王志豪让-皮埃尔·科林格林群雄连万益梁英强
Owner TAIWAN SEMICON MFG CO LTD