Chirp sonar hardware structure

Abstract

The invention relates to an FPGA-based chirp sonar hardware structure, which comprises a sonar communication unit, a sonar signal transmitting unit, a sonar signal receiving unit, a sonar transducer array and an FPGA-based sonar signal processing unit for controlling the above units, wherein the sonar communication unit is connected with the sonar signal processing unit; the sonar signal processing unit is connected with the sonar signal transmitting unit; the sonar signal transmitting unit is connected with the sonar transducer array; the sonar transducer array is connected with the sonar signal receiving unit; and the sonar signal receiving unit is connected with the sonar signal processing unit. By adopting the above technical scheme, the chirp sonar hardware structure of the invention has the advantages that the hardware needed by the processor is simplified into one piece compared with the original two pieces, the hardware has a simple structure, the size is small, the power consumption is low, the hardware has rich pins, the extension and the updating are simple and convenient, the data link has few nodes, and the reliability is high.

Description

technical field [0001] The invention relates to a sonar detection hardware structure, in particular to a hardware structure of a profile sonar. Background technique [0002] In recent years, with the development of marine resources development technology, the demand for high-resolution profile sonar has become more and more urgent. As an important underwater detection method, high-resolution profile sonar is very important for underwater detection and resource development. field plays an important role. [0003] However, the disadvantages in the prior art are: [0004] At present, the profile sonar signal processing device adopts a high-speed digital signal processor (DSP) as the main processor. In addition to the digital signal processor (DSP), the processing device must be combined with FPGA to form a sonar signal processing that can coordinate the cooperative division of various circuits. Due to the lack of flexibility of the signal processor (DSP), it is difficult to u...

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Problems solved by technology

[0004] At present, the profile sonar signal processing device uses a high-speed digital signal processor (DSP) as the main processor. In addition to the digital signal processor (DSP), the processing device must be combined with an FPGA to form a sonar signal processing that can coordinate the cooperation and division of various parts of the circuit. Due to the lack of flexibility of the signal processor (DSP), it is very difficult to upgrade the sonar system. Once the number of array elements is increased in the sonar system, it will inevitably mean that the data bit width increases, and the interface bit width of the signal processor (DSP) is Fixed, in order to adapt to the data bit width of the new system, the signal processor must be redesigned; in addition, the signal processor (DSP) needs to coordinate with the FPGA, which increases the data link nodes of the system, and the more data link nodes , the reliability of the system will inevitably become worse; due to the complex structure of the system and the large number of electronic devices required, the sonar signal processor is too large in size and power consumption is too high

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