A Novel High Sensitivity Sensitive Amplifier with Symmetrical Output Edge
A sensitive amplifier and high-sensitivity technology, which is applied in the direction of instruments, static memory, digital memory information, etc., to achieve the effect of reducing power consumption, reducing delay speed, and improving sensitivity
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0020] The present invention will be further described below through specific embodiments and accompanying drawings.
[0021] The sense amplifier structure of the present invention is no longer limited to the logic of the SR latch, but introduces a new slave latch controlled by the clock according to the overall function of the sense amplifier, which is sensitive to the first-stage pulse The generator circuit has a more symmetrical load with a structure like Figure 4 shown. The first-stage pulse generator used by the sense amplifier is the same as the traditional structure. Figure 4 The structure of the SR latch shown in the second stage is: the whole structure is composed of two inverters, 6 PMOS (Mp1~Mp6) transistors and 6 NMOS (Mn1~Mn6) transistors, the pull-up path and the pull-down The path is very symmetrical, S' and R' are the input nodes of the SR latch, CLK and CLKB are two complementary clocks, and Q and Q' are differential output nodes.
[0022] Figure 4 The ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


