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Layout of sense amplifier and its forming method, layout of memory

A sensitive amplifier and graphic technology, applied in static memory, digital memory information, information storage, etc., can solve the problem of large area of ​​the sensitive amplifier, achieve the effect of simplifying the method, realizing the circuit connection, and reducing the size

Active Publication Date: 2018-08-10
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the area of ​​the sense amplifier formed based on the logic design rule is relatively large

Method used

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  • Layout of sense amplifier and its forming method, layout of memory
  • Layout of sense amplifier and its forming method, layout of memory
  • Layout of sense amplifier and its forming method, layout of memory

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Embodiment Construction

[0039] In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0040] figure 1 It is a schematic diagram of a storage unit with an existing 6T structure. The storage unit includes: a first MOS transistor MOS1, a second MOS transistor MOS2, a third MOS transistor MOS3, a fourth MOS transistor MOS4, a fifth MOS transistor MOS5 and a sixth MOS transistor. MOS tube MOS6.

[0041] Both the source of the third MOS transistor MOS3 and the source of the fourth MOS transistor MOS4 are connected to the power line VDD. Both the source of the first MOS transistor MOS1 and the source of the second MOS transistor MOS2 are connected to the ground line VSS.

[0042] The drain of the third MOS transistor MOS3 is connected to the source of the fifth MOS transistor MOS5 , the drain of the first MOS transistor MOS1 , t...

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PUM

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Abstract

The invention relates to a sensitive amplifier domain and a forming method thereof and a memory domain. The forming method of the sensitive amplifier domain comprises the following steps: providing a memory unit domain, removing a second connection hole graph and a ninth connection hole graph in the memory unit domain; extending a first metallic graph along a second direction to connect with a second metal graph; and extending an eighth metallic graph along the second direction to connect with a sixth metal graph.

Description

technical field [0001] The invention relates to a layout of a sensitive amplifier, a forming method thereof, and a layout of a memory. Background technique [0002] With the increasing scale of the micro-processing design field, the memory area occupies most of the entire chip area, and with the development of technology, the content of memory in the chip will increase, so the design of high-density memory can be achieved in a certain The area of ​​the chip can be reduced to a certain extent, so that the cost can be reduced. The memory usually includes a memory array composed of memory cells, an address decoder, a read-write control circuit, and a sense amplifier, which is connected to the memory cells. [0003] Existing memory cell layouts and sense amplifier layouts are formed based on different rules. Generally, sense amplifier layouts are based on logic design rules, while memory cells are based on special design rules. However, the area of ​​the sense amplifier formed...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/06H01L27/02
Inventor 陈双文张静丁艳
Owner SEMICON MFG INT (SHANGHAI) CORP
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