Dual-wavelength annealing method and equipment

Abstract

Methods and apparatus for thermally processing semiconductor substrates are described. Solid state radiant emitters are used to provide thermal treatment energy fields. A second solid state radiation emitter is used to provide an activation energy field. The heat treatment energy and the activation energy are directed to the processing area of ​​the substrate, where the activation energy increases the absorption of the heat treatment radiation in the substrate, resulting in a heat treatment of the substrate in the area irradiated by the activation energy.

Description

technical field [0001] Embodiments of the present disclosure generally relate to the fabrication of semiconductor devices. More particularly, the methods and apparatus described in this disclosure relate to thermal processing methods and apparatus for forming crystalline semiconductors. Background technique [0002] Heat treatment is a common practice in the semiconductor industry. A semiconductor substrate is exposed to thermal energy of a particular intensity and / or type to achieve a particular result, such as annealing or crystallization. For example, silicon is often annealed, crystallized, melted, or otherwise treated with many different types of thermal and radiant energy. [0003] Radiant energy sources are available with a wide range of wavelengths and spectra. However, the spectral power distribution of available radiation sources does not match the absorption spectrum of silicon. For example, lasers emitting at 1064 nm are commonly used to anneal silicon substr...

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Problems solved by technology

These methods have limited utility for smaller features because background heating of the substrate leads to diffusion of dopants and loss of concentration profile in very thin doped layers

In the past, some methods have used longer wavelength radiation, where silicon has strong absorption, but long wavelength radiation (such as 8 μm to 16 μm wavelength) is very thin for annealing leading edge and future node devices ( For example, layers less than 100nm thick) are not useful

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