Location method of failure point and failure analysis method of chip

Abstract

The invention provides a failure point positioning method and a chip failure analysis method. Specifically, a chip comprises a substrate and a device located at the substrate. The positioning method includes: conducting thinning treatment on the back of the chip to a state close to the device; carrying out ion beam bombardment on the back of the chip subjected to thinning treatment so as to make an ion beam pass through the device; and performing electron-beam scanning on the front of the chip subjected to ion beam bombardment so as to position the location of a failure point in the chip. By means of ion beam bombardment on the back of the chip subjected to thinning treatment, the method provided by the invention makes the ion beam pass through the device and generates a breakdown area in the device, so that when a to-be-detected surface of the chip is scanned by electron beam, the surface charge generated on the to-be-detected surface can be released along the breakdown area on the device surface, the influence of surface charge on the device surface potential can be reduced, and then the position of the failure point in the device can be acquired accurately.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuits, in particular, to a method for locating a failure point and a method for analyzing failure of a chip. Background technique [0002] For chip failure analysis, the location of the failure point is very critical. Generally, the specific location of the failure point in the chip is determined by determining the failure point, so as to analyze the failure mechanism of the chip. Among the failure point location methods, the potential contrast location method is a widely used precise location method, which uses an electron beam to scan the surface of the sample to be tested to obtain the location of the failure point. [0003] In the prior art, the steps of the potential contrast positioning method using a scanning electron microscope (SEM) are: first, the sample is processed to the current layer to be observed; Measurement surface) to scan; Finally, the location of...

AI Technical Summary

Problems solved by technology

However, with the reduction of device size (especially the size of 28nm / 32nm or below), the enhancement of density, and the complexity of device structure and doping process, the problem of accumulating charge on the sample surface will be amplified. As a result, more charges will accumulate on the sample surface after scanning (such as figure 1 As shown), it is impossible to effectively locate the location of the failure point

[0005] For example, in the potential contrast positioning method using a scanning electron microscope (SEM), since the surface charge cannot be conducted away, it will seriously affect the surface potential of the sample, and further affect the depth of the SEM image display, resulting in the inability to effectively locate location of failure

figure 2 Shown is the SEM image obtained by using the potential contrast positioning method provided in the prior art, from figure 2 It can be seen that there are multiple bright spots in the SEM image, so the location of the failure point in the device cannot be determined by the bright spots

For the above problems, there is currently no effective solution

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