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Missile-borne SAR imaging system architecture design based on single-chip FPGA

An imaging system and architecture design technology, applied in the field of missile-borne SAR imaging system architecture design and missile-borne SAR real-time imaging processing, can solve the problems of complex system structure, difficult to meet, low efficiency, etc., to achieve small occupied volume and difficult to overcome. Improved, easy-to-control effects

Active Publication Date: 2016-08-10
XIDIAN UNIV
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  • Application Information

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Problems solved by technology

However, the disadvantage of this approach is that the system structure is complex, the power consumption is large, and the efficiency is low, which makes it difficult to meet the requirements of modern radars.

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  • Missile-borne SAR imaging system architecture design based on single-chip FPGA
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  • Missile-borne SAR imaging system architecture design based on single-chip FPGA

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Embodiment Construction

[0034] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0035] The embodiment of the present invention provides a single-chip FPGA-based missile-borne SAR imaging system architecture design. The single-chip FPGA includes a processing module PS and a programmable logic module PL. The processing module PS is provided with a dual-core ARM and DDR memory. The programmable logic module PL is provided with an FPGA module, a RAM module and a DMA module, and the dual-core ARM includes an ARM core 0 and an ARM core 1 . Spec...

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Abstract

The invention belongs to the radar signal processing field, and discloses a missile-borne SAR imaging system architecture design based on a single-chip FPGA. The single-chip FPGA comprises a processing module PS and a programmable logic module PL; the PS module is provided with a double-core ARM and a DDR storage device; the PL module is internally provided with an FPGA module, a RAM module and a DMA module; the FPGA module is used for obtaining an intermediate frequency digital echo signal, performing digital down-conversion and range direction pulse compression and storing the result in the RAM module. The core 0 of the ARM successively performs Doppler center estimation, distance moving correction, distance bending correction and Doppler frequency modulation estimation on the distance pulse compression image. The FPGA module performs motion error compensation, azimuth nonlinear scaling and azimuth pulse compression on the image after distance direction correction. The core 1 of the ARM performs multi-view processing and quantification processing on the azimuth pulse compression image to obtain an SAR image data.

Description

technical field [0001] The invention relates to the field of radar signal processing, in particular to a single-chip FPGA-based missile-borne SAR imaging system architecture design, which can be used for missile-borne SAR (Synthetic Aperture Radar) real-time imaging processing. Background technique [0002] Synthetic Aperture Radar (SAR) has the characteristics of all-day, all-weather, long-distance and high-resolution imaging. An important function of SAR is imaging, which has been widely used in military and civilian fields. [0003] Since the movement of missile-borne SAR is more complex than that of airborne SAR and space-borne SAR, and the real-time requirements are higher, the research and application of missile-borne SAR imaging is still relatively slow. However, due to the needs of enhancing national defense and military power, and the continuous improvement of the precision guidance technology requirements of various countries, the real-time imaging of missile-born...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20
CPCG06T1/20
Inventor 丁金闪梁毅陈文俊王敏
Owner XIDIAN UNIV
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