Signal establishing time control circuit and dynamic storage based on same

A dynamic memory and control circuit technology, applied in static memory, information storage, digital memory information, etc., can solve the problems of short storage retention time and increase the data retention time of dynamic memory, etc.

Inactive Publication Date: 2016-09-28
XI AN UNIIC SEMICON CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0006] In order to solve the technical problem that the existing dynamic memory adopts the same signal setup time during activation operation and refresh operation, and the storage retention time is short, one of the purposes of the present invention is to provide a signal setup time control circuit, and the second purpose is to provide A dynamic memory based on a control circuit to increase the data retention time of the dynamic memory

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  • Signal establishing time control circuit and dynamic storage based on same
  • Signal establishing time control circuit and dynamic storage based on same
  • Signal establishing time control circuit and dynamic storage based on same

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Embodiment Construction

[0022] A new control method for dynamic memory signal setup time. as attached Image 6 As shown, when the activation operation or the refresh operation, wlmimic will rise, indicating that the word line has been selected and raised, there are two paths from wlmimic to SA_en, path 1 only passes through the delay module sdt timer1, path 2 passes through sdt timer1 and then After sdt timer2, which path the output SA_en passes through is determined by the multiplexer controlled by the signal refresh, and the signal setup time is determined by the delay modules in these two paths. When the dynamic memory performs the activation operation, refresh=0, wlmimic to SA_en passes through path 1, and the signal establishment time is only the delay of the delay module sdt timer1. When the dynamic memory performs a refresh operation, refresh=1, wlmimic to SA_en passes through path 2, and the signal establishment time is increased on the basis of the delay of the delay module sdt timer1 The d...

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Abstract

The invention relates to a signal establishing time control circuit and a dynamic storage based on the same. The signal establishing time control circuit comprises a first delay unit, a second delay unit and a multiplexer, wherein a selected word line signal wlmimic is divided into two paths by virtue of the first delay unit, the first path directly outputs a signal SA_en1, the second path outputs a signal SA_en2 by virtue of the second delay unit, the multiplexer outputs sense amplifier enabling signals by selecting the signal SA_en1 and the signal SA_en2, and the gating of the multiplexer is controlled by virtue of signal refresh. According to the signal establishing time control circuit, the technical problem of short storage retention time when same signal establishing time is adopted during activation operation and refresh operation of an existing dynamic storage is solved, and the data retention time of the dynamic storage is effectively prolonged.

Description

technical field [0001] The invention relates to a dynamic memory, the improvement of which is to lengthen the signal development time in the prior art dynamic memory in the refresh state so as to increase the data retention time of the dynamic memory. Background technique [0002] Such as figure 1 As shown, the dynamic memory storage unit is composed of a transistor and a capacitor. Data is stored on the capacitor. Due to the leakage path, the charge on the capacitor will be lost, so the dynamic memory must have a refresh operation to keep the data on the capacitor. A refresh operation of a dynamic memory is internally composed of multiple activation (ACT) operations. as attached figure 2 As shown, the activation operation principle is as follows: before the activation operation, the voltage of the word line is low, the voltage of the bit line (bl) and the reference bit line (ref_bl) is an intermediate voltage, assuming that the value stored in the memory cell is '1', its...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
CPCG11C11/406
Inventor 亚历山大段会福
Owner XI AN UNIIC SEMICON CO LTD
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