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Chip packaging structure and preparation method thereof

A chip packaging structure and chip technology, applied in the field of electronics, can solve problems such as solder ball defects, collapse, and gold wire deformation, and achieve the effects of improving packaging yield, avoiding short circuits, and reducing chip packaging costs.

Inactive Publication Date: 2016-10-05
SPREADTRUM COMM (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0002] The lead frame type package structure is a main form of integrated circuit package. The lead frame type package structure of the prior art is as follows: figure 1 As shown, it includes a package body 1 and pins 4 connected to the outside. The package body 1 includes a base 2 and a chip 3. The chip 3 is bonded to the base 2 and connected to the pin 4 through a metal lead 5; wherein, The metal leads 5 interconnect the input and output solder joints of the chip 3 and the inner legs of the pins through metal wires. However, this wire bonding process is prone to problems such as solder ball defects, gold wire deformation, and collapse, which affect the packaging yield.

Method used

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  • Chip packaging structure and preparation method thereof
  • Chip packaging structure and preparation method thereof
  • Chip packaging structure and preparation method thereof

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Embodiment Construction

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0028] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0029] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0030] refer to figure 2 , a chip packaging structure, including,

[0031] A lead frame body comprising:

[...

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Abstract

The invention relates to a chip packaging structure and a preparation method thereof, and belongs to the technical field of semiconductors. The chip packaging structure comprises a lead frame body, the lead frame body comprises a recessed substrate and pins, the recessed substrate is used to bear a chip, the pins are placed in the periphery of the recessed substrate, and each pin is connected to an input-output welding point of the chip via a metal electrode. The recessed substrate of the chip is fixed, an insulating layer is deposited on the chip and the upper surface of the substrate, the metal electrodes are prepared to connect the substrate with the chip, and thus, the chip is packaged; and the metal electrodes are used to replace metal leads, problems that the metal leads are shorted or collapse can be overcome, the yield rate of packaging is improved, and the chip packaging cost is reduced.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a chip packaging structure and a preparation method thereof. Background technique [0002] The lead frame type package structure is a main form of integrated circuit package. The lead frame type package structure of the prior art is as follows: figure 1 As shown, it includes a package body 1 and pins 4 connected to the outside. The package body 1 includes a base 2 and a chip 3. The chip 3 is bonded to the base 2 and connected to the pin 4 through a metal lead 5; wherein, The metal leads 5 interconnect the input and output solder joints of the chip 3 and the inner legs of the pins through metal wires. However, this wire bonding process is prone to problems such as solder ball defects, gold wire deformation, and collapse, which affect the packaging yield. Contents of the invention [0003] The object of the present invention is to provide a chip packaging structure to solve ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/495H01L23/49H01L21/60
CPCH01L2224/48091H01L2224/73265H01L2224/73267H01L2224/32245H01L2924/15153H01L2224/24245H01L2924/181H01L2924/00014H01L2224/48247H01L2924/00012
Inventor 朱小荣
Owner SPREADTRUM COMM (SHANGHAI) CO LTD