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Wafer-level chip size encapsulation technology for GaAs (gallium arsenide) CCD (Charge Coupled Device) image sensor

A technology of chip size packaging and image sensor, which is applied in the process of producing decorative surface effects, decorative art, metal material coating process, etc., can solve the problems of low reliability and interconnection density, high process cost, etc., and achieve reduction Packaging cost and process difficulty, increasing interconnection density, and the effect of reliable packaging

Active Publication Date: 2012-06-20
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its feature is that the extended pad is used to make trapezoidal grooves on the side of the image sensor, thereby forming a T-shaped connection. The trapezoidal grooves can be machined or plasma-etched. The disadvantages are high process costs, low reliability and interconnection density. Low

Method used

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  • Wafer-level chip size encapsulation technology for GaAs (gallium arsenide) CCD (Charge Coupled Device) image sensor
  • Wafer-level chip size encapsulation technology for GaAs (gallium arsenide) CCD (Charge Coupled Device) image sensor
  • Wafer-level chip size encapsulation technology for GaAs (gallium arsenide) CCD (Charge Coupled Device) image sensor

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Embodiment Construction

[0056] In order to fully demonstrate the advantages and positive effects of the present invention, the substantive features and remarkable progress of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0057] Such as image 3 Shown is a cross-sectional view of a GaAs CCD image sensor wafer-level chip-scale package 20 manufactured according to the best embodiment of the present invention.

[0058] Such as Figure 4 Shown is a cross-sectional view of the packaging structure and interconnection structure according to the best implementation mode of the present invention. In this embodiment, the trapezoidal groove structure 13 includes a circle of vertical interconnection vias 14, and the bumps 09 adopt a partial array structure. . From Figure 4 It can be seen that the signal of the sensor chip is transmitted from the active surface to the back of the chip through the vertical interconnection hole and the trap...

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Abstract

The invention relates to a wafer-level chip size encapsulation technology for a GaAs (gallium arsenide) CCD (Charge Coupled Device) image sensor. The technology is characterized by comprising the following steps of: (1) firstly bonding a glass wafer and a GaAs wafer through a resin adhesive so as to protect the active surface of a chip and improve the strength of a chip wafer; (2) manufacturing a trapezoidal-slot structure by a wet corrosion or physical method so as to reduce the lining thickness of a chip interconnection area; (3) manufacturing vertical interconnected through holes by a dry etching technology so as to expose a pad on the active surface of the chip; (4) sputtering seed-layer metal and electroplating, and manufacturing a hole metalizing and RDL layer to realize circuit interconnection from the active surface to the back surface of the chip; (5) manufacturing a passivation layer, a UBM layer and raised points; and (6) finally scribing to form an independent encapsulation chip. As the trapezoidal-slot structure on the back realizes thickness reduction only in the area with the pad, the cost is effectively lowered; and through the interconnection of the vertical through holes, the encapsulation interconnection density can be improved, and the signal transmission path is shortened.

Description

technical field [0001] The present invention relates to a GaAs CCD image sensor wafer-level chip size packaging process and structure, more precisely relates to a GaAs CCD image sensor wafer-level chip size packaging process realized by adopting trapezoidal groove structure and vertical through-hole interconnection technology, GaAs The CCD image sensor is a MEMS (MicroElectroMechanical System, Micro Electro Mechanical System) sensing device, and therefore belongs to the field of MEMS device packaging. Background technique [0002] MEMS refers to a system made of micro-fabrication technology, integrating micro-sensors, micro-components, micro-actuators, signal processing, and control circuits. MEMS devices have very broad application prospects in many fields, and image sensors, as a kind of MEMS devices, are particularly widely used. The pixel structure of image sensors is extremely susceptible to contamination and damage, which affects its performance. Wafer-level chip size...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768B81C1/00
Inventor 王双福罗乐徐高卫韩梅
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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