Aluminum-substrate-based three-dimensional lamination chip packaging structure and preparation method thereof

Abstract

The invention discloses an aluminum-substrate-based three-dimensional lamination chip packaging structure and a preparation method thereof. The structure comprises at least two layers of functionalized aluminum substrates, chips, aluminum-based dams, epoxy resin base bodies, a side metalized interconnection layer, and a signal leading-out layer. The functionalized aluminum substrates arranged in parallel have two opposite first surfaces and second surfaces. Chips are pasted on the second surfaces. The aluminum-based dams are pasted on the first surfaces. The epoxy resin base bodies are arranged between the functionalized aluminum substrates and the aluminum-based dams. The side metalized interconnection layer and the signal leading-out layer are arranged at the outer sides of the packaging structure in an encircling mode. The functionalized aluminum substrates contain aluminum-buried interconnection layers and through holes; and the chips and the aluminum-buried interconnection layers are electrically connected. Besides, the method includes the steps of preparation of functionalized aluminum substrates, preparation of through holes of the functionalized aluminum substrates, packaging of a multi-chip module, preparation of a signal leading-out layer; packaging of a three-dimensional lamination layer, and preparation of a side metalized interconnection layer. According to the invention, the packaging efficiency and interaction density are improved; and the size of the three-dimensional lamination chip packaging is effectively reduced.

Description

technical field [0001] The invention relates to the field of microelectronic packaging, in particular to a packaging structure of a three-dimensional laminated chip based on an aluminum substrate and a preparation method thereof. Background technique [0002] As microelectronic packaging technology continues to evolve, it presents the challenge of meeting three system metrics: size, performance, and cost. Due to the elimination of individual packages and their parasitic effects, the multichip module (Multichip Module, MCM) has the characteristics of being able to obtain smaller, lighter systems and faster speeds, and has become one of the most cost-effective packaging technologies. [0003] Three-dimensional laminated chip packaging is an effective way to solve the electrical interconnection between chips and chips, and between chips and substrates. It is the development trend of multi-chip modules in the Z direction and is a key technology in the field of microelectronics t...

AI Technical Summary

Problems solved by technology

The co-fired ceramic substrate is affected by the process, and the line spacing is large, which cannot meet the needs of high-density substrates. The poor heat dissipation and large shrinkage affect its use in high-power high-frequency device packaging; the organic packaging substrate and chip Large CTE mismatch, more sensitive to moisture, affecting the reliability of the packaging structure

Glass substrates face the problems of high processing difficulty and high cost

The three-dimensional stacked chip package based on the assembly of packaged chips often uses Kovar alloy as the carrier of the chip. Kovar has a relatively large proportion and has little effect on further reducing the volume and weight of the package.

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