De-convolutional interleaver and de-convolutional interleaving method

Abstract

The present invention provides a de-convolutional interleaver applied to process multi-group convolutional interleaving data. The multi-group convolutional interleaving data package includes multiple convolutional interleaving data which is formed by processing multi-group non-interleaving data through convolutional interleaving processing, each non-interleaving data includes L data, and adjacent two data corresponds a delay depth gap in each non-interleaving data after the convolutional interleaving processing, wherein L is a positive integer. The de-convolutional interleaver includes: an input data buffer configured to temporarily store multi-group convolutional interleaving data; a memory controller configured to store the multi-group convolutional interleaving data temporarily stored in the input data buffer in the memory to perform de-convolutional interleaving processing, the memory address of each stored convolutional interleaving data being determined by the delayed depth, the L value and the delay depth distance corresponding to the data; and an output data buffer configured to temporarily store multi-group convolutional interleaving data read from the memory.

Description

technical field [0001] The present invention relates to a de-interleaver and a de-interleaving method, and more particularly to a de-convolutional interleaver and a de-convolutional interleaving method. Background technique [0002] Communication transmission technology (such as Orthogonal Frequency Division Multiplexing (OFDM) wireless transmission technology) in order to strengthen the signal's resistance to interference, it will perform time interleaving (Time Interleaving) processing on the signal at the transmitting end, and apply time interleaving to the signal at the receiving end. It is processed by Time De-interleaving. The schematic diagram of time interleaved processing is as follows: figure 1 As shown, the architecture 100 includes K interleaving processing units 110, and each interleaving processing unit 110 has n c inputs and n c output terminals, respectively used to receive and output signals in sequence according to the signal sampling clock, and the arch...

AI Technical Summary

Problems solved by technology

One current technology is to use static random access memory (SRAM) to achieve the function of the delay buffer. Although the SRAM access speed is fast, it is not conducive to cost-effectiveness because it is quite expensive; another current technology is to use a shared system Memory is used to realize the function of the delay buffer. Since the system memory is usually a synchronous dynamic random access memory (SDRAM), the price is relatively cheap, so the hardware cost can be saved. However, this technology writes the data continuously according to the order in which the data is received. into the SDRAM (the memory address written earlier is overwritten earlier), the receiving order is not sorted according to the continuity of the data due to the convolutional interleaving process of the transmitting end, so when the deconvolution and interleaving process is performed, the data is restored continuity, this technology often needs to read data from memory addresses of different columns (Different Rows). For different column address areas in SDRAM, after the first read operation is completed, a precharge operation (precharge) is required to close the column address area corresponding to the first read operation, and then pass through it again The row open operation (row active) opens the row address area corresponding to the second read operation, so that when multiple data are interleaved and stored in different row location areas, the additional precharge operation and row open operation will be It will consume a lot of access time for continuous row accessing change (Row Accessing Change). In short, this technology not only requires a long deconvolution and interleaving processing time, but also affects other circuits' access to system memory. memory bandwidth

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